Hi, all
I'm integrating the new h264fhd encoder provided by TI which support 1080I encoding on DM6467, I encounter a lot of problems. I changed the memory configuration from the server.tcf file to enlarge the DDR2 section size and change the L2 cache configuration according to the encoder datasheet. But when changing the EDMA channel configuration, I wondered the encoder requires 49 channels of the total 64, so is there enough edma channels left for the DSP? From the C64x+ EDMA user guide, I think the ARM requires a lot of edma channels to handle the external event such as ASP and VPSS. If I need to allocate 49 channels for the DSP, which channels can be removed from the configuration for ARM? Thanks all.
The way to switch on trace for FC 2.23 release is to add the following in your cfg file and rebuild your application :-
xdc.useModule("ti.sdo.fc.global.Settings").profile = "debug_trace";
Running your application wiht the environment variable CE_DEBUG=3, should give you full trace from Framework Components as well as Codec Engine.
To make sure that there is no conflict between the resources used by ARM and DSP, you need to check the following.
For the ti.sdo.fc.edma3.Settings module, please check the config variable "regionConfig" in your server config file.
If EDMA3.regionConfig is set to some structure, check the fields "ownDmaChannels, ownTcc.. PaRams" etc and make sure that they do NOT overlap with the EDMA3 resources assigned to ARM. These bitmasks correspond to the resources that wil be used to satisfy codec requests to DSP for EDMA3 resources.
If EDMA3.regionConfig is set to NULL (This is the default setting), you will need to look at the default setting of this parameter in:-
edma3_lld_1_06_00_01/packages/ti/sdo/edma3/rm/src/configs/edma3_dm646x_cfg.c:defInstInitConfig[0][1]. This are the default values being used to configure the DSP-side EDMA3 resources. Typically, these defaults are set in such a manner, so that the ARM-side resources are excluded.If these defaullts are not what you want, you will need to override these settings by creating a new structure and assigning it to EDMA3.regionConfig.
http://wiki.davincidsp.com/index.php/Configuration_of_EDMA3_RM_in_Framework_Components
I revised the EDMA channel configuration in the kernel, and still I can't create the algorithm. According to the error message "ti.sdo.ce.alg.Algorithm - Algorithm_create> Algorithm creation FAILED; make sure that 1) alg params are correct/appropriate, 2) there is enough internal and external algorithm memory available -- check DSKT2 settings for heap assignments and scratch allocation", I check the params setting for the algorithm and also the memory configuration, and now I want to track the DSKT2 trace to find the memory requirement for the new 1080I encoder. I set the trace and debug attribute for the server, and build with the debug_trace lib of DSKT2 and EDMA3, but still no trace infomation for DSKT2 and EDMA3. I find this article http://community.ti.com/forums/p/6884/28424.aspx, and revise the server trace connection, but when running Server_connectTrace function, error code 6 is returned, which means "A connection for server trace is already established". So how to correctly get the DSKT2 and EDMA3 trace? By the way, I don't quite understand the code "Server_connectTrace(hServer, ...);".
What version of Framework Components/Codec Engine etc are you using ?!
I'm using the framework_components_2_23_02, I think I find the problem, when linking, also linked with the lib under the debug folder, but even if tuning on the DSKT2.trace=true, It'll never link with the lib under debug_trace. I exchange the lib under debug and debug_trace, so I can get the TRACE info. Thanks Gunjan. From the trace info, when calling AlgInit, it failed with a return of -1, I think maybe the parameter needs to be changed when using the 1080I encoder even only encoding with 720P resolution comparing to the original 720 encoder. I'll try other parameter initialization.
Again to the EDMA configuration problem, I can change the edma channel and tcc allocated for ARM throught the kernel file arch/arm/mach-davinci/dma.c, there is also a header file to define all the channles usde by ARM that isn't correspond to an event, but I can't find any file to tell the DSP which EDMA channels can be used. So is the simple declaration of the maxEdmaChannels in the server.cfg enough to tell the DSP the EDMA resources? Or is there any files to define the allocation for the DSP edma channels?
There are a couple of ways DSP side EDMA channels are configured by the system integrator when using Codec Engine.:-
Assuming codecs are doing the right thing, there are two different ways they can request EDMA resources using Codec Engine/Framework Components.
- They can implement the IDMA3 interface and then use the DMAN3 library (ti.sdo.fc.dman3.DMAN3 module) to manage and grant DMA resources. If the codecs are using the IDMA3 inteface, then in your server config file, you will see DMAN3 specific configuration being used to grant resources.
- They can implement the IRES EDMA3CHAN interface and then use the EDMA3 library (ti.sdo.fc.edma3.Settings module) to manage and grant DMA resources. If hte codecs are using the IRES_EDMA3CHAN interface, then in your server config file, you will see EDMA3 specific configuration.
If you tell me what kind of interface/resource manager is being used, I will try and provide more details on how to control DMA resource assignment.
Here is a helpful article:-
http://wiki.davincidsp.com/index.php/Dma_overview
This part talks about configuring ti.sdo.fc.edma3.Settings module:-
Thanks, Guanjan. I use the IRES EDMA3CHAN interface and I find the configuration for the EDMA resources used by DSP under the framework component folder. From the configuration file, I find there're already 49 EDMA channels allocated for the DSP of DM6467.
yes, I got it. Thanks Gunjan
Hi, Touse and Gunjan. I am trying to reuse the DMAI video_encode_io1 example with the new h264fhd encoder on DM6467 and I am facing exactly the same problem as Touse, but after reading carefully this tread, I do not figure out what was exactly the problem, and how the answer proposed by Gunian helped to solve it. Was it a conflict between the resources used by ARM and DSP? Could you please be more specific in the steps to get to work the h264fhd for the non-expert-yet users ;)? Thank you!
Hi, Alonso.
What Guanjan guide me is the way to allocate and confirm the allocation of DMA resources between arm and DSP, and also the method of enable the trace utility to debug where the problem is. The step is quite easy, just as the server integrator user guide points out. You have to solve the problems encountered after using trace. With the trace output, I think you can get to learn where the problem is and solve it.
HI touse,.
did you intergrated the new new h264fhd encoder successfully ? I am now encountering the same problem as you did. How do you solve the error-"alginit() return -1" ? By the way,you mentioned that you changed the memory configuration from the server.tcf file to enlarge the DDR2 section size and change the L2 cache configuration according to the encoder datasheet. Can you explain this in detail?
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