http://community.ti.com/forums/All Postsen-USCommunityServer 2008.5 SP2 (Debug Build: 40407.4157)http://community.ti.com/forums/thread/49330.aspxTue, 17 Nov 2009 21:10:50 GMT35ded035-4cd5-4bbd-851f-937553e04a39:49330charly3http://community.ti.com/forums/thread/49330.aspxhttp://community.ti.com/forums/commentrss.aspx?SectionID=12&PostID=49330<p>Hi I have been a question about&nbsp;DSP430 with sensor applications.</p> <p>What is the highest bandwidth sensor signal that can be input into DSP430?</p> <p>I know DSP430 is a 8MHz microcontroller.&nbsp;Is this related with the sampling rate?</p> <p>Also how does this change with the # of sensor signals? </p> <p>What will change&nbsp;if increasing the # of sensors? </p> <p>&nbsp;</p> <p>Can anyone give me some instruction or hint about these questions?</p> <p>Thanks a lot!</p> <p>&nbsp;</p><div style="clear:both;"></div>http://community.ti.com/forums/thread/50009.aspxSat, 21 Nov 2009 02:53:57 GMT35ded035-4cd5-4bbd-851f-937553e04a39:50009dajiapeng1http://community.ti.com/forums/thread/50009.aspxhttp://community.ti.com/forums/commentrss.aspx?SectionID=33&PostID=50009<p>为了提高DM642的EDMA传输速度，我将EMIF的CLOCK设置成了CPU4分频，也就是150MHZ，SDRAM芯片使用HY57V283220-6（166MHZ）。</p> <p>我的情况：</p> <p>&nbsp;&nbsp;&nbsp;&nbsp; 当我通过EDMA传输的数据保存到SDRAM中时，在view memory中看得时候，没刷新一下，数据就会变（可以保证这个时候EDMA不会再向SDRAM中写数）,保存至内部RAM中的时候数据没问题（也就是说硬件电路上，不是电磁干扰的原因）。</p> <p>问题：&nbsp; 这个是不是EMIF寄存器设置的原因？ 该如何设置。我的寄存器设置如下：</p> <p>EMIFA_Config Seeddm642ConfigA ={<br />&nbsp;&nbsp;&nbsp; EMIFA_FMKS(GBLCTL, EK2RATE, FULLCLK)&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(GBLCTL, EK2HZ, CLK)&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(GBLCTL, EK2EN, ENABLE)&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(GBLCTL, BRMODE, MRSTATUS)&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(GBLCTL, NOHOLD, DISABLE)&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(GBLCTL, EK1HZ, HIGHZ)&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(GBLCTL, EK1EN, ENABLE)&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(GBLCTL, CLK4EN, ENABLE)&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(GBLCTL, CLK6EN, ENABLE),<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; <br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(CECTL, WRSETUP, DEFAULT)&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(CECTL, WRSTRB, DEFAULT)&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(CECTL, WRHLD, DEFAULT)&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(CECTL, RDSETUP, DEFAULT)&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(CECTL, TA, DEFAULT)&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(CECTL, RDSTRB, DEFAULT)&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(CECTL, MTYPE, SDRAM64)&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(CECTL, RDHLD, DEFAULT),<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; <br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(CECTL, WRSETUP, OF(7))&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(CECTL, WRSTRB, OF(14))&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(CECTL, WRHLD, OF(2))&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(CECTL, RDSETUP, OF(2))&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(CECTL, TA, OF(2))&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(CECTL, RDSTRB, OF(20))&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(CECTL, MTYPE, ASYNC8)&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(CECTL, RDHLD, OF(1)),<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; <br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(CECTL, WRSETUP, OF(2))&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(CECTL, WRSTRB, OF(2))&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(CECTL, WRHLD, OF(2))&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(CECTL, RDSETUP, OF(1))&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(CECTL, TA, OF(2))&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(CECTL, RDSTRB, OF(1))&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(CECTL, MTYPE, ASYNC32)&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(CECTL, RDHLD, OF(1)),</p> <p><br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(CECTL, WRSETUP, OF(2))&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(CECTL, WRSTRB, OF(10))&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(CECTL, WRHLD, OF(2))&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(CECTL, RDSETUP, OF(2))&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(CECTL, TA, OF(2))&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(CECTL, RDSTRB, OF(10))&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(CECTL, MTYPE, SYNC32)&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(CECTL, RDHLD, OF(2)),<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; <br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(SDCTL, SDBSZ, 4BANKS)&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(SDCTL, SDRSZ, 12ROW)&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(SDCTL, SDCSZ, 8COL)&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(SDCTL, RFEN, ENABLE)&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(SDCTL, INIT, YES)&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(SDCTL, TRCD, OF(3))&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(SDCTL, TRP, OF(3))&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(SDCTL, TRC, OF(10))&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(SDCTL, SLFRFR, DISABLE),<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; <br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(SDTIM, XRFR, OF(1))&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(SDTIM, PERIOD, OF(2605)),<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; <br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(SDEXT, WR2RD, OF(1))&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(SDEXT, WR2DEAC, OF(3))&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(SDEXT, WR2WR, OF(1))&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(SDEXT, R2WDQM, OF(3))&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(SDEXT, RD2WR, OF(5))&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(SDEXT, RD2DEAC, OF(1))&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(SDEXT, RD2RD, OF(1))&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(SDEXT, THZP, OF(3))&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(SDEXT, TWR, OF(2))&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(SDEXT, TRRD, OF(2))&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(SDEXT, TRAS, OF(7))&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(SDEXT, TCL, OF(3)),&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; <br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; <br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_CESEC_DEFAULT,</p> <p>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_CESEC_DEFAULT,<br />&nbsp;&nbsp;EMIFA_CESEC_DEFAULT,</p> <p>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(CESEC, SNCCLK, ECLKOUT2)&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(CESEC, RENEN, READ)&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(CESEC, CEEXT, ACTIVE)&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(CESEC, SYNCWL, 0CYCLE)&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; EMIFA_FMKS(CESEC, SYNCRL, 3CYCLE)<br />};</p><div style="clear:both;"></div>http://community.ti.com/forums/thread/50012.aspxSat, 21 Nov 2009 05:47:54 GMT35ded035-4cd5-4bbd-851f-937553e04a39:50012Arrow Vancouver0http://community.ti.com/forums/thread/50012.aspxhttp://community.ti.com/forums/commentrss.aspx?SectionID=32&PostID=50012Hi, anybody has tested the ethernet performance using OMAP3503 with an external 10/100 ethernet MAC? Also want to find out how much CPU power it takes to handle that throughput. Will AM3505 do better than OMAP3503 with an enternal MAC? Thanks!<div style="clear:both;"></div>http://community.ti.com/forums/thread/47803.aspxTue, 10 Nov 2009 03:43:24 GMT35ded035-4cd5-4bbd-851f-937553e04a39:47803Sinoj B S6http://community.ti.com/forums/thread/47803.aspxhttp://community.ti.com/forums/commentrss.aspx?SectionID=138&PostID=47803<p>Hi, I&#39;m trying to implement an XDS100 of my own. I&#39;ve looked at the schematic downloaded from TI web, XDS100 V1.0 USB (TSM320_USB_JTAG_ti_RevC2). I didn&#39;t see anywhere in the schematic 5V&lt;-&gt;3V3 or 5V&lt;-&gt;1V8 conversion is taking place on the JTAG and EMU0/1 lines that are commected to the target. Is the JTAG lines within the target is capable of handling this? Does anyone implemented a working XDS100 USB JTAG Emulator of their own? Am I missing something? -Regards -Sinoj</p><div style="clear:both;"></div>http://community.ti.com/forums/thread/18321.aspxThu, 16 Apr 2009 21:14:56 GMT35ded035-4cd5-4bbd-851f-937553e04a39:18321Scott Hansen8http://community.ti.com/forums/thread/18321.aspxhttp://community.ti.com/forums/commentrss.aspx?SectionID=39&PostID=18321<p>I have just started to use the TI DSP development environment and I <br />have got a question that is very simple (I would assume) but I am <br />wasting way too much time trying to figure out.</p> <p>I am doing plane wave beamforming on the DSP ... I want to transmit <br />the resulting data out via UART. &nbsp;The board I am using has a UART <br />output and I can transmit out characters without any problems. &nbsp;My <br />problem is that all my data is in floating point form (32 bit). &nbsp;But <br />in UART I transmit one char at a time 8 bits. &nbsp;Does anyone know an <br />easy way to take the array of floating point (32 bit) numbers and <br />selectively transmit them in 8 bit increments?</p> <p>Thanks for any help.</p> <p>S </p><div style="clear:both;"></div>http://community.ti.com/forums/thread/49932.aspxFri, 20 Nov 2009 16:08:03 GMT35ded035-4cd5-4bbd-851f-937553e04a39:49932kenny_k2http://community.ti.com/forums/thread/49932.aspxhttp://community.ti.com/forums/commentrss.aspx?SectionID=33&PostID=49932<p>(November 15, 2009 - 08:34:22am)</p> <p>Hello,</p> <p>I am a PMP user and I have a couple Coby 4320s.(similar to the MemUp - Orizon) The units have several bugs and&nbsp; I want to backup/update the bios and repair some bad registers. I have had no luck with the services of coby, and they are very negative to anybody with these units. As far as they are concerned; they no longer support the PMP or the DaVinci line.</p> <p>(I am well aware of the EOL for some things, but ***&#39;on...its only 36months old and I love what the TiDSP can do...it was a good idea in 2005, and since 2006; i spent over a grand on popular PMPs with Ti DSPs and MPUs...in hopes that the promised fun and support showed.)</p> <p>Since 2007; I have looked for update information on the early/popular Davinci DSP (TMS320DM270) and all the devices it went into. Much to my surprise; the SoC and most things made with it; have been &#39;snuffed&#39; underground to an almost non-existant presence.</p> <p>Now, I am forced to ask; </p> <p>Is there a win98/2k software or driver to help me backup/download my bios and flash on these PMP units without using the JTAG port; but using the USB port?</p> <p>Is there is a &quot;seed&quot; file or something i can place on the hard drive&#39;s root to help me get a dump or copy of the OS in place?</p> <p>Does anybody know what Coby used as an OS on these units?</p> <p>I use win98/2k/xp, and have no access to expensive test equipment or high-end ide software. A simple flash or dsp utility would be nice, but if it takes a JTAGjet w/ccs 1x/2x (cheap), lets talk... </p> <p>Much Thanx in advance...</p> <p>Kenny_K.<br />reply to: <a href="mailto:kenny_k@peoplepc.com">kenny_k@peoplepc.com</a></p><div style="clear:both;"></div>http://community.ti.com/forums/thread/18555.aspxMon, 20 Apr 2009 04:10:54 GMT35ded035-4cd5-4bbd-851f-937553e04a39:18555BrandonAzbell5http://community.ti.com/forums/thread/18555.aspxhttp://community.ti.com/forums/commentrss.aspx?SectionID=28&PostID=18555<p>Currently, only some of the forums provide options to &quot;Suggest an answer&quot;, &quot;Mark as answer&quot;, etc.</p> <p>I would like to see this added to all forums, therefore we can quickly identify which threads have an ending, or answer.</p> <p>This is intended to provide a means of quickly identifying ongoing threads versus those that actually do have an answer and are closed.</p><div style="clear:both;"></div>http://community.ti.com/forums/thread/37283.aspxTue, 01 Sep 2009 13:42:18 GMT35ded035-4cd5-4bbd-851f-937553e04a39:37283Danny H3http://community.ti.com/forums/thread/37283.aspxhttp://community.ti.com/forums/commentrss.aspx?SectionID=33&PostID=37283<p>Hello,</p> <p>&nbsp;</p> <p>I have an &nbsp;EVMDM6467 board. It is set up for TFTP kernel load and NFS root. If I put a DVSDK1.4 kernel on my TFTP server, it boots fine and loads the NFS root file system with no problems. However, if I change the uImage file on the TFTP server to a DVSDK 2.0 kernel, for example &#39;PSP_02_00_00_140/bin/dm6467/uImage-dm6467&#39;, I get this:</p> <p>TFTP from server 10.10.10.240; our IP address is 10.10.10.241<br />Filename &#39;uImage&#39;.<br />Load address: 0x80700000<br />Loading: #################################################################<br />&nbsp; #################################################################<br />&nbsp; #################################################################<br />&nbsp; #################################################################<br />&nbsp; #################################################################<br />&nbsp; ################################################################<br />done<br />Bytes transferred = 1988588 (1e57ec hex)<br />## Booting image at 80700000 ...<br />&nbsp; Image Name: Linux-2.6.18_pro500-davinci_evm-<br />&nbsp; Image Type: ARM Linux Kernel Image (uncompressed)<br />&nbsp; Data Size: 1988524 Bytes = 1.9 MB<br />&nbsp; Load Address: 80008000<br />&nbsp; Entry Point: 80008000<br />&nbsp; Verifying Checksum ... OK<br />OK<br /><br />Starting kernel ...<br /><br />Uncompressing Linux................................................................................................................................... done, booting the kernel.<br />Linux version 2.6.18_pro500-davinci_evm-arm_v5t_le (x0029463@aspbuild11) (gcc version 4.2.0 20070126 (prerelease) (MontaVista 4.2.0-3.0.0.0702771 2007-03-10)) #1 PREEMPT Wed May 20 01:14:17 IST 209CPU: ARM926EJ-S [41069265] revision 5 (ARMv5TEJ), cr=00053177</p> <p>....</p> <p>&nbsp;</p> <p>Switched to high resolution mode on CPU 0<br />IP-Config: Complete:<br />&nbsp; device=eth0, addr=10.10.10.241, mask=255.255.254.0, gw=10.10.10.1,<br />&nbsp; host=off, domain=, nis-domain=(none),<br />&nbsp; bootserver=255.255.255.255, rootserver=10.10.10.240, rootpath=<br />Looking up port of RPC 100003/2 on 10.10.10.240<br />Root-NFS: Unable to get nfsd port number from server, using default<br />Looking up port of RPC 100005/1 on 10.10.10.240<br />Root-NFS: Unable to get mountd port number from server, using default<br />Root-NFS: Server returned error -5 while mounting /home/dny/work/filesys<br />VFS: Unable to mount root fs via NFS, trying floppy.<br />VFS: Cannot open root device &quot;nfs&quot; or unknown-block(2,0)<br />Please append a correct &quot;root=&quot; boot option<br />Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(2,0)<br /></p> <p>I tried the following:</p> <p>Disabling firewall, using DHCP, changing /etc/exports - in all cases the 1.4 kernel boots while the 2.0 kernel does not.</p> <p>&nbsp;</p> <p>U-boot settings:</p> <p>baudrate=115200<br />bootfile=&quot;uImage&quot;<br />bootcmd=tftp;bootm<br />ethaddr=00:0e:99:02:b3:02<br />serverip=10.10.10.240<br />ipaddr=10.10.10.241<br />bootdelay=1<br />bootargs=console=ttyS0,115200n8 noinitrd rw ip=10.10.10.241 root=/dev/nfs nfsroot=10.10.10.240:/home/dny/work/filesys,nolock,tcp,rsize=1024,wsize=1024 mem=120M<br />stdin=serial<br />stdout=serial<br />stderr=serial<br /></p> <p>&nbsp;</p> <p>Any help would be appreciated!</p><div style="clear:both;"></div>http://community.ti.com/forums/thread/48495.aspxThu, 12 Nov 2009 22:44:20 GMT35ded035-4cd5-4bbd-851f-937553e04a39:48495saltan5http://community.ti.com/forums/thread/48495.aspxhttp://community.ti.com/forums/commentrss.aspx?SectionID=31&PostID=48495<p>&nbsp;</p> <p>We have a custom design c5509a board. When we set the CLKMD register to 0x2512 to adjust the PLL frequency to 120 MHz , everything is ok but when we set the value to 0x2892 to adjust the PLL frequency to 204 MHz ( and we have to run the code at this speed) the code sometimes run but sometimes hangs on. </p> <p>I saw some suggestions on internet to disable the CLKMD pin for PLL unstability situations. See below internet links for details </p> <p>http://www.dsprelated.com/groups/c55x/show/979.php. </p> <p>How CLKOUT disabling can influence the PLL stabiliy or unstability. And in detail do you have any ideas about this problem. We encounter the same problem in all of our new PCBs.</p> <p> First I thought that our core voltage is not enough to run on this speed and increased it a little to 1.72Volt but the problem is still there. </p> <p>12Mhz Oscillator clock is very good when I look with an oscilloscope. </p> <p>The PCB has 8 layers ans as you figure I can not touch some of the DSP pins because it is BGA</p> <p>Is there a problem on c5509a about the PLL or something. </p> <p>&nbsp;</p> <p>Target : c5509a </p> <p>Crystal : 12 Mhz </p> <p>Emulator : xds510 usb plus CC Studio 3.1 </p> <p>DSP/BIOS was USED in the project </p> <p>CLKMD value : 0x2892 </p> <p>PLL Freq = 204MHz</p> <p>Used peripherals in design : EMIF for sdram, audio processing, SPI, I2C nearly all of the peripherals </p> <p>&nbsp;</p> <p>waiting for your urgent reply guys</p><div style="clear:both;"></div>http://community.ti.com/forums/thread/50004.aspxSat, 21 Nov 2009 01:57:12 GMT35ded035-4cd5-4bbd-851f-937553e04a39:50004Ken Brown0http://community.ti.com/forums/thread/50004.aspxhttp://community.ti.com/forums/commentrss.aspx?SectionID=32&PostID=50004<p>So we have a number of our boards back, and we find that when you press the warm reset button, some boards reboot immediately, where others will wait maybe 10 seconds before rebooting.&nbsp; (We are performing the reset with the processor booted into u-boot).</p> <p>Our warm reset circuit is very standard, I think.&nbsp; When pressed, it connects nRESWARM (on the 65920 PMIC) and SYS_nRESWARM (on the OMAP 3503) to ground.&nbsp; When not pressed, those two signals are pulled to 1.8V_IO with a 4.7K resistor.</p> <p>Interestingly, if software (u-boot) issues a reset (writing 2 to PRM_RSTCTRL) the same thing occurs.&nbsp; Some boards will reset immediately, others wait 10 seconds.&nbsp; An individual board will behave the same no matter whether you do software or button reset.&nbsp; Either it&#39;ll be immediate reset or a 10 sec reset, depending on the board.</p> <p>On boards which exhibit the 10 second reset, the boot rom reports that it has performed an MPU watchdog reset when it (eventually) launches xloader (bit 4 of the Reset reason field of the Booting Parameters Structure is set.&nbsp; Entire byte value is 0x51).&nbsp; On boards which do not exhibit the 10 second reset, the boot rom does not report a watchdog (Reset reason = 0x41).&nbsp; So it seems clear that something in the boot rom is dying on boards which have the 10 second reset, and the watchdog is saving us.</p> <p>It seems to not matter whether we are booting from our MMC card or from the on-board NAND chip.&nbsp; Nor does it seem to matter whether we&#39;ve programmed our warm reset sequence in the PMIC.&nbsp; And the chip revision seems to be the same on all boards.</p> <p>I&#39;ve looked at the chip errata (SPRZ278D, revised March &#39;09), and I think I&#39;ve been able to rule out any errata that appeared to have some relevance.</p> <p>Anyone else seen this kind of problem before?</p> <p>Any suggestions on how to figure out why the boot rom sometime dies on reset and sometimes does not (depending on the board)?</p> <p>And does anyone have any ideas regarding things that might be overlooked by xloader and u-boot that are relevant?</p> <p>&nbsp;</p> <p>Thanks in advance,</p> <p>Ken</p> <p>&nbsp;</p><div style="clear:both;"></div>http://community.ti.com/forums/thread/49872.aspxFri, 20 Nov 2009 08:00:27 GMT35ded035-4cd5-4bbd-851f-937553e04a39:49872Maxim Yachnyy1http://community.ti.com/forums/thread/49872.aspxhttp://community.ti.com/forums/commentrss.aspx?SectionID=12&PostID=49872<p>Hello!</p> <p>I&#39;m trying a new msp430F47186. And there are some problems i&#39;ve found in this device:</p> <p>1. I can&#39;t assign, for example, SD16_A channel 0 to inputs A1-A5, only to A0! Exactly the same behavior in other channels - I can assign each channel only one corresponding input.&nbsp;If I assign channel Inappropriate his entrance, then the conversion result is a noise around zero.&nbsp;But in UserGuide is said, that i can assign any internal channel to any AX input...</p> <p>2. Bootstrap loader doesn&#39;t work at all. If i try to get BSL version using BSL_Scripter.exe program it returns &quot;ERROR (2xx assumed)&quot;. Using debugger I&#39;ve read the memory at location 0xC00 (start of BSL):</p> <p> <p>&nbsp;000C00 &nbsp; &nbsp;0C06 &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; mova &nbsp; &nbsp;@R12,R6</p> <p>&nbsp;000C02 &nbsp; &nbsp;0C1E &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; mova &nbsp; &nbsp;@R12+,R14</p> <p><b>&nbsp;000C04 &nbsp; &nbsp;3FFF &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; jmp &nbsp; &nbsp; 0xC04 &nbsp;- what is this? In previous versions of BSL (under 2.13) there were no jump to itself!&nbsp;</b></p> <p>I thought thait it is a bug in revision of my MCU, but i haven&#39;t found this bug in Erratasheet.</p> <p>I would appreciate your answers, if any.</p> <p>&nbsp;</p> </p><div style="clear:both;"></div>http://community.ti.com/forums/thread/17493.aspxWed, 08 Apr 2009 19:37:51 GMT35ded035-4cd5-4bbd-851f-937553e04a39:17493John Videtich18http://community.ti.com/forums/thread/17493.aspxhttp://community.ti.com/forums/commentrss.aspx?SectionID=185&PostID=17493<p>Hi all,</p> <p>I am working with a TLV320AIC32EVM evaluation board and the corresponding USB-MODEVM.&nbsp; I had set it up successfully some time ago and am trying to duplicate the process.</p> <p><br /><br />I lost the CD and am missing the driver for Windows to detect the EVM.&nbsp; I have not had success finding the windows drivers for the USB audio device from the product page - http://focus.ti.com/docs/toolsw/folders/print/tlv320aic32evm-pdk.html - or by using Google searches or by scanning my computer for the previously installed drivers.</p> <p>&nbsp;</p> <p>Any suggestions?</p> <p>&nbsp;</p> <p>Thank you!</p> <p>&nbsp;</p> <p>&nbsp;&nbsp;&nbsp;&nbsp; -&nbsp;&nbsp; John</p><div style="clear:both;"></div>http://community.ti.com/forums/thread/49998.aspxFri, 20 Nov 2009 23:23:18 GMT35ded035-4cd5-4bbd-851f-937553e04a39:49998Randy Wu0http://community.ti.com/forums/thread/49998.aspxhttp://community.ti.com/forums/commentrss.aspx?SectionID=85&PostID=49998<p>Hi Champs,</p> <p>Would anyone happen to have a working, complete demo app for MSP430F543x and CC1100/CC2500?&nbsp; I know the F5438EXP board comes with some simple HAL RF functions, but there isn&#39;t a complete demo application that runs on top of the HAL.</p> <p>Thanks,</p> <p>-Randy</p><div style="clear:both;"></div>http://community.ti.com/forums/thread/49358.aspxTue, 17 Nov 2009 23:11:46 GMT35ded035-4cd5-4bbd-851f-937553e04a39:49358Walter Snafu18http://community.ti.com/forums/thread/49358.aspxhttp://community.ti.com/forums/commentrss.aspx?SectionID=32&PostID=49358<p>I just received my OMAP-L138 EVM, and tried starting up Code Composer Studio v3.3&nbsp;to work with it.&nbsp; But Code Composer Studio v 3.3 will not start unless I have defined a target system.&nbsp; To define a target system I must use the Setup CCStudio v3.3 program, where&nbsp;I selected the most appropriate target from the list, and saved it.&nbsp; Then when I try now try to start Code Composer Studio v3.3, it makes the following complaint:</p> <p>&nbsp;&nbsp;&nbsp; Unable to find an appropriate registry key for &quot;ICEPick_C&quot;<br />&nbsp;&nbsp;&nbsp; Target driver: C:\Program Files\CCStudio_v3.3\drivers\tixds510icepick_c.dvr</p> <p>I&#39;ve tried many variations on that, always with the same result.&nbsp; Any clues on what I should try next?</p> <p>Thanks for your help.</p> <p>-- Walter</p> <p>&nbsp;</p><div style="clear:both;"></div>http://community.ti.com/forums/thread/49721.aspxThu, 19 Nov 2009 16:10:50 GMT35ded035-4cd5-4bbd-851f-937553e04a39:49721Jonathan1http://community.ti.com/forums/thread/49721.aspxhttp://community.ti.com/forums/commentrss.aspx?SectionID=84&PostID=49721<p>Hi,</p> <p>I&#39;m working with the development kit to make spatial modulations of laser beams and I have a few questions:</p> <p>1. When projecting a static image of black and white (no shades), do the mirrors stay in place, or do they jiggle? If the latter, how do I make them static?</p> <p>2. I read posts about 1:1 pixel - mirror correspondence, but didn&#39;t get a clear answer about how can this be done. Switching to HVGA mode is enough?</p> <p>3. Is there any documentation on replacing the light source?</p> <p>&nbsp;</p> <p>Thanks in advance</p> <p>Jonathan</p><div style="clear:both;"></div>http://community.ti.com/forums/thread/47437.aspxFri, 06 Nov 2009 13:35:29 GMT35ded035-4cd5-4bbd-851f-937553e04a39:47437Rene Wassenburg4http://community.ti.com/forums/thread/47437.aspxhttp://community.ti.com/forums/commentrss.aspx?SectionID=120&PostID=47437<p>Hi there,</p> <p>I&#39;m new on this forum, so i hope i posted this topic in the right forum section.</p> <p>&nbsp;</p> <p>I&#39;m using a TLC5947, and i want to drive 1W LEDs. For this is I want to use a buck converter from Zetex; the ZXLD1350.</p> <p>http://www.diodes.com/zetex/_pdfs/3.0/pdf/ZXLD1350.pdf</p> <p>The outputs of the TLC5947 are constant current and the input of the ZXLD1350 wants to be hooked to an open collector output. The TLC5947 is an open collector, so that should work.</p> <p>&nbsp;</p> <p>However, my analog skills are not top notch, and the internal schematic of both the TLC5947 and the ZXLD1350 are unclear to me.</p> <p>Am i right that i CAN hookup the ZXLD1350 straight to the output of the TLC5947?</p> <p>&nbsp;</p> <p>Or..should I put a pullup resistor to the output of the TLC5947 and the connect the output (via a resistor divider) into the base of an external NPN transistor? The collector of this external transistor can then be hooked to the input of the Zetex.</p> <p>I&#39;m very confused in this.</p> <p>Of course I want to minimize the amount of components on my board, but I am really not sure if i can directly drive the Zetex chip with the TLC5947.</p> <p>Hope somebody can clear this up for me..</p> <p>Thanx in advance!</p> <p>&nbsp;</p> <p>&nbsp;</p> <p>I understand that if i do so, i will have inverted PWM, but doesnt matter, my software can correct that.</p> <p>Can somebody help me out with this?</p> <p>&nbsp;</p><div style="clear:both;"></div>http://community.ti.com/forums/thread/49891.aspxFri, 20 Nov 2009 10:53:20 GMT35ded035-4cd5-4bbd-851f-937553e04a39:49891OMAP_mipi1http://community.ti.com/forums/thread/49891.aspxhttp://community.ti.com/forums/commentrss.aspx?SectionID=32&PostID=49891<p>I am using a specific feature of the OMAP3530 (MIPI interface to test my IC). But all my software skills are based on microcontroller era :(</p> <p>Can someone tell me how to develop&nbsp;a &quot;bare bone&quot; firmware (no OS) from scratch using CCS4 with XDS510USB JTAG? is it possible to power on the 3530,&nbsp;connect the JTAG to the target board (OMAP3530&nbsp;+ micron PoP) and run &quot;Hello World&quot;? I tried, but the&nbsp;CCS&nbsp;could not even dowload the software to the target board. I did not include any initialization code (PM, CM configuraton, etc)&nbsp;yet, only&nbsp;main(){printf (&quot;Hello, world&quot;);}.</p> <p>Thanks in advance, </p> <p>-MIPI user. </p> <p>&nbsp;</p> <p>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;</p><div style="clear:both;"></div>http://community.ti.com/forums/thread/49971.aspxFri, 20 Nov 2009 19:36:57 GMT35ded035-4cd5-4bbd-851f-937553e04a39:49971madelgi2http://community.ti.com/forums/thread/49971.aspxhttp://community.ti.com/forums/commentrss.aspx?SectionID=12&PostID=49971<p>Good morning:</p> <p>&nbsp;</p> <p>Can I use a pin that has been configured as an interrupt and as a general purpose I/O ? </p> <p>My application uses a pushbutton that triggers an interrupt on the rising edge. Then the software takes a decision based on the time the button has been pushed (1, 5 or 10 seconds). So I need to be able detect the irq request but also to continue reading the logic status of the pin, without losing the irq capabilities. </p> <p>Thanks.</p> <p>&nbsp;</p><div style="clear:both;"></div>http://community.ti.com/forums/thread/49908.aspxFri, 20 Nov 2009 14:42:17 GMT35ded035-4cd5-4bbd-851f-937553e04a39:49908sankar1http://community.ti.com/forums/thread/49908.aspxhttp://community.ti.com/forums/commentrss.aspx?SectionID=32&PostID=49908<p>Hi all,</p> <p>I am working in a camera driver for windows ce 6.0 with OMAP3530. In the driver code there are some write values in CSI2 mode....whose base address mentioned is 0x480BD800...I couldn&#39;t able to find any register with this address in the data sheet...can someone explain how csi2 and parallel mode are connected between omap3530 and the sensor? 2. Also how to find these register value?</p> <p>-Regards,</p> <p>Sankar</p><div style="clear:both;"></div>http://community.ti.com/forums/thread/43119.aspxFri, 09 Oct 2009 19:47:19 GMT35ded035-4cd5-4bbd-851f-937553e04a39:43119ngvin7http://community.ti.com/forums/thread/43119.aspxhttp://community.ti.com/forums/commentrss.aspx?SectionID=38&PostID=43119<p>I am using TCP2 in C6455. I don&#39;t know how to set the tail symbol registers (i.e. TCPIC6 to TCPIC11). The manual (pp. 50 to pp. 55 in SPRU973 May 2006) is not clear. It always talks about CDMA-2000. I have also looked at the code in the function TCP2_tailConfig3GPP(). I have tried using this code. The first canned Matlab testvector passes (i.e. TCP2 output bits match with Matlab generated bits). However the second test vector fails. I always use 161 as frame length. I am using TCP2 for 3GPP HSDPA decoding. </p> <div>Below is my code of setting TCP2 tail symbol registers.</div> <div></div> <div></div> <div>/* Set TCP2 tail registers in gst_tcp_config, i.e. TCPIC6 to TCPIC11. */ </div> <div></div> <div>// pui_in = input array of uint32. packed input symbols. Refer to figure 5 in pp. 22 of SPRU973 May 2006. Rate 1/3. </div> <div></div> <div>// auc_tail = array of 12 uint8 </div> <div></div> <div>// ui_fl = 161 </div> <div></div> <div>// gst_tcp_config = structure. type = TCP2_ConfigIc. </div> <div></div> <div> <div>&nbsp;&nbsp; auc_tail[0] &nbsp;= _extu(pui_in[ui_fl], 26, 26);</div> <div>&nbsp;&nbsp; auc_tail[1] &nbsp;= _extu(pui_in[ui_fl], 20, 26);</div> <div>&nbsp;&nbsp; auc_tail[2] &nbsp;= _extu(pui_in[ui_fl], 8, 26);</div> <div>&nbsp;&nbsp; auc_tail[3] &nbsp;= _extu(pui_in[ui_fl + 1], 26, 26);</div> <div>&nbsp;&nbsp; auc_tail[4] &nbsp;= _extu(pui_in[ui_fl + 1], 20, 26);</div> <div>&nbsp;&nbsp; auc_tail[5] &nbsp;= _extu(pui_in[ui_fl + 1], 8, 26); &nbsp;&nbsp;</div> <div>&nbsp;&nbsp; auc_tail[6] &nbsp;= _extu(pui_in[ui_fl + 2], 26, 26);</div> <div>&nbsp;&nbsp; auc_tail[7] &nbsp;= _extu(pui_in[ui_fl + 2], 20, 26);</div> <div>&nbsp;&nbsp; auc_tail[8] &nbsp;= _extu(pui_in[ui_fl + 2], 8, 26); &nbsp;&nbsp;</div> <div>&nbsp;&nbsp; auc_tail[9] &nbsp;= _extu(pui_in[ui_fl + 3], 26, 26);</div> <div>&nbsp;&nbsp; auc_tail[10] = _extu(pui_in[ui_fl + 3], 20, 26);</div> <div>&nbsp;&nbsp; auc_tail[11] = _extu(pui_in[ui_fl + 3], 8, 26); &nbsp; &nbsp; &nbsp;</div> <div>&nbsp;&nbsp; gst_tcp_config.ic6 &nbsp;= (auc_tail[4] &lt;&lt; 12) | (auc_tail[2] &lt;&lt; 6) | auc_tail[0];</div> <div>&nbsp;&nbsp; gst_tcp_config.ic7 &nbsp;= (auc_tail[5] &lt;&lt; 12) | (auc_tail[3] &lt;&lt; 6) | auc_tail[1];</div> <div>&nbsp;&nbsp; gst_tcp_config.ic8 &nbsp;= 0;</div> <div>&nbsp;&nbsp; gst_tcp_config.ic9 &nbsp;= (auc_tail[10] &lt;&lt; 12) | (auc_tail[8] &lt;&lt; 6) | auc_tail[6];</div> <div>&nbsp;&nbsp; gst_tcp_config.ic10 = (auc_tail[11] &lt;&lt; 12) | (auc_tail[9] &lt;&lt; 6) | auc_tail[7];</div> <div>&nbsp;&nbsp; gst_tcp_config.ic11 = 0;</div> </div> <div></div> <div></div><div style="clear:both;"></div>http://community.ti.com/forums/thread/49990.aspxFri, 20 Nov 2009 22:34:21 GMT35ded035-4cd5-4bbd-851f-937553e04a39:49990Robert Lewis0http://community.ti.com/forums/thread/49990.aspxhttp://community.ti.com/forums/commentrss.aspx?SectionID=182&PostID=49990<p>I have searched and read through the notes on connecting the SGND for the TPA6132A2 stereo amp and do not understand the correct connection. </p> <p>The doc set specifies SGND as&nbsp;&quot;Amplifier reference voltage. Connect to ground terminal of the headphone&quot;. But we have a four layer pcb with the center plane as GND. On any layout we do, the router directly connects the common on the headphone jack to GND and SGND to ground via a via at the closest point to each of&nbsp;these two signals. Therefore they are not directly connected to one another other than by the internal ground plane.</p> <p>Should we manually run a trace from the common on the headphone jack to an island polygon SGND within the main&nbsp;GND plane and then use this separate ground plane as an isolated ground plane within the inner ground, and finally tie this &#39;island&#39; ground plan to the main digital ground plane with a single trace? The entire board is digital with the exception of this amp.</p> <p>Thank you for any suggestions and help.</p> <p>Robert</p><div style="clear:both;"></div>http://community.ti.com/forums/thread/49936.aspxFri, 20 Nov 2009 16:18:31 GMT35ded035-4cd5-4bbd-851f-937553e04a39:49936Carl2http://community.ti.com/forums/thread/49936.aspxhttp://community.ti.com/forums/commentrss.aspx?SectionID=32&PostID=49936<p><span style="font-family:Arial;font-size:x-small;"><span style="font-size:10pt;font-family:Arial;">I am having some problems connecting 512MBytes of DDR2 to the L138. It looks like the row/col address bus is limited to 14 bits (A0-13). That would require a sinlge x16 device since x8 devices appear to have 15 address bits (A0-14). If that is the case, currently the only x16 4Gbit parts are very expensive twin die parts. </span></span></p> <p><span style="font-family:Arial;font-size:x-small;"><span style="font-size:10pt;font-family:Arial;">Is there a method of connecting (2) 256MByte x8 devices of DDR2 to the L138? </span></span></p> <p><span style="font-family:Arial;font-size:x-small;"><span style="font-size:10pt;font-family:Arial;"><br /></span></span></p><div style="clear:both;"></div>http://community.ti.com/forums/thread/49857.aspxFri, 20 Nov 2009 06:00:04 GMT35ded035-4cd5-4bbd-851f-937553e04a39:49857Joe Tijerina6http://community.ti.com/forums/thread/49857.aspxhttp://community.ti.com/forums/commentrss.aspx?SectionID=32&PostID=49857<p>I&#39;m using the OMAP-L138 eXperimenter Kit from Logic PD.&nbsp; I am using the example under the &quot;edma3_lld_01_10_00_01&quot; packages as my starting point for setting up and using the edma3 driver in my project.&nbsp;&nbsp; </p> <p>The example I&#39;m looking at is the edma3_test() under dma_test.c.&nbsp; It was setup to&nbsp;dma transfer buffers of 8-bit elements. </p> <p>extern signed char&nbsp;&nbsp; _srcBuff1[MAX_BUFFER_SIZE];<br />extern signed char&nbsp;&nbsp; _dstBuff1[MAX_BUFFER_SIZE];</p> <p>I&#39;m interested in doing 16-bit transfers&#39;s instead of 8-bit.&nbsp; However, if I&nbsp;increase the buffers to signed short, I start having issues.&nbsp; The dma transfer is incomplete when it gets copied to the destination address (only half of the&nbsp;values&nbsp;copied), see src and dest&nbsp;memory results below&nbsp;from one of my runs.&nbsp; Is there a way to modify this example to do&nbsp;16 or 32 bit transfers?&nbsp;&nbsp;&nbsp;&nbsp;</p> <p><span style="text-decoration:underline;">Ex:</span>&nbsp; With a&nbsp;PARAM set&nbsp;of ACNT=16, BCNT=1, CCNT=1, DSTBIDX=16, SRCBIDX=16&nbsp;</p> <p>Assigning _srcBuff = 0:15</p> <p>0xC4000000&nbsp;<strong>_srcBuff1</strong><br />0xC4000000&nbsp;0x00010000<br />0xC4000004&nbsp;0x00030002<br />0xC4000008&nbsp;0x00050004<br />0xC400000C&nbsp;0x00070006<br />0xC4000010&nbsp;0x00090008<br />0xC4000014&nbsp;0x000B000A<br />0xC4000018&nbsp;0x000D000C<br />0xC400001C&nbsp;0x000F000E</p> <p>0xC4020000&nbsp;<strong>_dstBuff1</strong><br />0xC4020000&nbsp;0x00010000<br />0xC4020004&nbsp;0x00030002<br />0xC4020008&nbsp;0x00050004<br />0xC402000C&nbsp;0x00070006<br />0xC4020010&nbsp;0x00000000<br />0xC4020014&nbsp;0x00000000<br />0xC4020018&nbsp;0x00000000<br />0xC402001C&nbsp;0x00000000</p> <p>&nbsp;</p><div style="clear:both;"></div>http://community.ti.com/forums/thread/49661.aspxThu, 19 Nov 2009 10:07:10 GMT35ded035-4cd5-4bbd-851f-937553e04a39:49661Cathy Luo1http://community.ti.com/forums/thread/49661.aspxhttp://community.ti.com/forums/commentrss.aspx?SectionID=33&PostID=49661<p>The DVSDK version is DVSDK_1_40_02_33.</p> <p>And the aac codec is from TI.</p> <p>The detail trace is as follows.</p> <p>@0,192,980us: [+4 T:0x40018060 S:0xbefff96c] OG - Global_init&gt; This program was built with the following packages:<br />@0,193,694us: [+4 T:0x40018060 S:0xbefff96c] OG -&nbsp;&nbsp;&nbsp;&nbsp; package gnu.targets.rts470MV (/home/bh/dvsdk_1_40_02_33/xdctools_3_15_01_59/packages/gnu/targets/rts470MV/) [1, 0, 0, 0]<br />@0,193,911us: [+4 T:0x40018060 S:0xbefff96c] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.sdo.codecs.aacenc (/home/bh/dvsdk_1_40_02_33/audio_transcode/packages/ti/sdo/codecs/aacenc/) [1, 0, 0]<br />@0,194,057us: [+4 T:0x40018060 S:0xbefff96c] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.xdais.dm (/home/bh/dvsdk_1_40_02_33/xdais_6_10_01/packages/ti/xdais/dm/) [1, 0, 4]<br />@0,194,256us: [+4 T:0x40018060 S:0xbefff96c] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.xdais (/home/bh/dvsdk_1_40_02_33/xdais_6_10_01/packages/ti/xdais/) [1, 2.0, 1]<br />@0,194,392us: [+4 T:0x40018060 S:0xbefff96c] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.sdo.utils.trace (/home/bh/dvsdk_1_40_02_33/framework_components_2_10_02/packages/ti/sdo/utils/trace/) [1, 0, 0]<br />@0,194,527us: [+4 T:0x40018060 S:0xbefff96c] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.sdo.ce.utils.xdm (/home/bh/dvsdk_1_40_02_33/codec_engine_2_10_02/packages/ti/sdo/ce/utils/xdm/) [1, 0, 1]<br />@0,194,660us: [+4 T:0x40018060 S:0xbefff96c] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.sdo.fc.dman3 (/home/bh/dvsdk_1_40_02_33/framework_components_2_10_02/packages/ti/sdo/fc/dman3/) [1, 0, 3]<br />@0,194,791us: [+4 T:0x40018060 S:0xbefff96c] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.sdo.fc.acpy3 (/home/bh/dvsdk_1_40_02_33/framework_components_2_10_02/packages/ti/sdo/fc/acpy3/) [1, 0, 2]<br />@0,194,921us: [+4 T:0x40018060 S:0xbefff96c] OG -&nbsp;&nbsp;&nbsp;&nbsp; package dsplink.gpp (/home/bh/dvsdk_1_40_02_33/dsplink-davinci-v1.50-prebuilt/packages/dsplink/gpp/) [3, 0, 0]<br />@0,195,054us: [+4 T:0x40018060 S:0xbefff96c] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.sdo.linuxutils.cmem (/home/bh/dvsdk_1_40_02_33/cmem_2_10/packages/ti/sdo/linuxutils/cmem/) [2, 0, 1]<br />@0,195,188us: [+4 T:0x40018060 S:0xbefff96c] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.catalog.arm (/home/bh/dvsdk_1_40_02_33/xdctools_3_15_01_59/packages/ti/catalog/arm/) [1, 0, 1, 0]<br />@0,195,319us: [+4 T:0x40018060 S:0xbefff96c] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.catalog (/home/bh/dvsdk_1_40_02_33/xdctools_3_15_01_59/packages/ti/catalog/) [1, 0, 0]<br />@0,195,450us: [+4 T:0x40018060 S:0xbefff96c] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.catalog.c6000 (/home/bh/dvsdk_1_40_02_33/xdctools_3_15_01_59/packages/ti/catalog/c6000/) [1, 0, 0, 0]<br />@0,195,582us: [+4 T:0x40018060 S:0xbefff96c] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.platforms.evmDM6467 (/home/bh/dvsdk_1_40_02_33/bios_5_33_04/packages/ti/platforms/evmDM6467/) [1, 0, 0, 0]<br />@0,195,714us: [+4 T:0x40018060 S:0xbefff96c] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.sdo.ce.osal (/home/bh/dvsdk_1_40_02_33/codec_engine_2_10_02/packages/ti/sdo/ce/osal/) [2, 0, 2]<br />@0,195,845us: [+4 T:0x40018060 S:0xbefff96c] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.sdo.ce.osal.linux (/home/bh/dvsdk_1_40_02_33/codec_engine_2_10_02/packages/ti/sdo/ce/osal/linux/) [2, 0, 1]<br />@0,195,979us: [+4 T:0x40018060 S:0xbefff96c] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.sdo.ce.ipc (/home/bh/dvsdk_1_40_02_33/codec_engine_2_10_02/packages/ti/sdo/ce/ipc/) [2, 0, 1]<br />@0,196,110us: [+4 T:0x40018060 S:0xbefff96c] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.sdo.ce.ipc.dsplink (/home/bh/dvsdk_1_40_02_33/codec_engine_2_10_02/packages/ti/sdo/ce/ipc/dsplink/) [2, 0, 1]<br />@0,196,242us: [+4 T:0x40018060 S:0xbefff96c] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.sdo.ce.alg (/home/bh/dvsdk_1_40_02_33/codec_engine_2_10_02/packages/ti/sdo/ce/alg/) [1, 0, 1]<br />@0,196,372us: [+4 T:0x40018060 S:0xbefff96c] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.sdo.ce (/home/bh/dvsdk_1_40_02_33/codec_engine_2_10_02/packages/ti/sdo/ce/) [1, 0, 6]<br />@0,196,502us: [+4 T:0x40018060 S:0xbefff96c] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.sdo.ce.audio (/home/bh/dvsdk_1_40_02_33/codec_engine_2_10_02/packages/ti/sdo/ce/audio/) [1, 0, 2]<br />@0,196,631us: [+4 T:0x40018060 S:0xbefff96c] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.sdo.codecs.aacenc.ce (/home/bh/dvsdk_1_40_02_33/audio_transcode/packages/ti/sdo/codecs/aacenc/ce/) [1, 0, 0]<br />@0,196,763us: [+4 T:0x40018060 S:0xbefff96c] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.sdo.ce.bioslog (/home/bh/dvsdk_1_40_02_33/codec_engine_2_10_02/packages/ti/sdo/ce/bioslog/) [1, 0, 1]<br />@0,196,893us: [+4 T:0x40018060 S:0xbefff96c] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.sdo.ce.utils.trace (/home/bh/dvsdk_1_40_02_33/codec_engine_2_10_02/packages/ti/sdo/ce/utils/trace/) [1, 0, 1]<br />@0,197,026us: [+4 T:0x40018060 S:0xbefff96c] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.sdo.app.audio_app (/home/bh/dvsdk_1_40_02_33/audio_transcode/packages/ti/sdo/app/audio_app/) []<br />@0,197,300us: [+0 T:0x40018060 S:0xbefff974] OG - Global_atexit&gt; enter (fxn=0x19990)<br />@0,197,478us: [+0 T:0x40018060 S:0xbefff974] OG - Global_atexit&gt; enter (fxn=0x18e28)<br />@0,197,703us: [+0 T:0x40018060 S:0xbefff944] OM - Memory_alloc&gt; Enter(0x18)<br />@0,197,880us: [+0 T:0x40018060 S:0xbefff944] OM - Memory_alloc&gt; return (0x3e3d0)<br />@0,198,261us: [+0 T:0x40018060 S:0xbefff964] OG - Global_atexit&gt; enter (fxn=0x17710)<br />@0,198,502us: [+0 T:0x40018060 S:0xbefff944] OM - Memory_alloc&gt; Enter(0x18)<br />@0,198,664us: [+0 T:0x40018060 S:0xbefff944] OM - Memory_alloc&gt; return (0x3e420)<br />@0,198,804us: [+0 T:0x40018060 S:0xbefff964] OG - Global_atexit&gt; enter (fxn=0x1535c)<br />@0,199,032us: [+0 T:0x40018060 S:0xbefff96c] OG - Global_atexit&gt; enter (fxn=0x184ac)<br />@0,199,255us: [+0 T:0x40018060 S:0xbefff954] ti.sdo.ce.osal.Sem - Sem_create&gt; count: 0<br />@0,199,406us: [+0 T:0x40018060 S:0xbefff93c] OM - Memory_alloc&gt; Enter(0x14)<br />@0,199,551us: [+0 T:0x40018060 S:0xbefff93c] OM - Memory_alloc&gt; return (0x3e4a0)<br />@0,199,710us: [+0 T:0x40018060 S:0xbefff954] ti.sdo.ce.osal.Sem - Leaving Sem_create&gt; sem[0x3e4a0]<br />@0,199,856us: [+0 T:0x40018060 S:0xbefff954] ti.sdo.ce.osal.Sem - Sem_create&gt; count: 0<br />@0,199,990us: [+0 T:0x40018060 S:0xbefff93c] OM - Memory_alloc&gt; Enter(0x14)<br />@0,200,201us: [+0 T:0x40018060 S:0xbefff93c] OM - Memory_alloc&gt; return (0x3e4b8)<br />@0,200,342us: [+0 T:0x40018060 S:0xbefff954] ti.sdo.ce.osal.Sem - Leaving Sem_create&gt; sem[0x3e4b8]<br />@0,200,476us: [+0 T:0x40018060 S:0xbefff93c] OM - Memory_alloc&gt; Enter(0x18)<br />@0,200,611us: [+0 T:0x40018060 S:0xbefff93c] OM - Memory_alloc&gt; return (0x3e4d0)<br />@0,200,745us: [+0 T:0x40018060 S:0xbefff93c] OT - Thread_create&gt; Enter (fxn=0x1449c, attrs=0x0)<br />@0,200,878us: [+0 T:0x40018060 S:0xbefff924] OM - Memory_alloc&gt; Enter(0x64)<br />@0,201,014us: [+0 T:0x40018060 S:0xbefff924] OM - Memory_alloc&gt; return (0x3e4f0)<br />@0,201,629us: [+0 T:0x40018060 S:0xbefff93c] OT - Thread_create&gt; Exit (task=0x3e4f0)<br />@0,201,816us: [+0 T:0x40018060 S:0xbefff974] OG - Global_atexit&gt; enter (fxn=0x1405c)<br />@0,201,988us: [+0 T:0x40018060 S:0xbefff974] OG - Global_atexit&gt; enter (fxn=0x16150)<br />@0,202,240us: [+0 T:0x40018060 S:0xbefff95c] ti.sdo.ce.alg - ALG_init&gt; Enter<br />@0,202,392us: [+0 T:0x40018060 S:0xbefff94c] OG - Global_atexit&gt; enter (fxn=0x135a4)<br />@0,202,540us: [+0 T:0x40018060 S:0xbefff97c] ti.sdo.ce.alg - ALG_init&gt; Exit<br />@0,202,676us: [+0 T:0x40018060 S:0xbefff974] OG - Global_atexit&gt; enter (fxn=0x13044)<br />@0,202,875us: [+0 T:0x40018060 S:0xbefff94c] OM - Memory_alloc&gt; Enter(0x18)<br />@0,203,033us: [+0 T:0x40018060 S:0xbefff94c] OM - Memory_alloc&gt; return (0x3e688)<br />@0,203,177us: [+0 T:0x40018060 S:0xbefff974] OG - Global_atexit&gt; enter (fxn=0x18610)<br />@0,204,965us: [+1 T:0x40ad0b60 S:0x40ad052c] OP - daemon&gt; thread created.<br />@0,205,196us: [+0 T:0x40ad0b60 S:0x40ad052c] OP - getCmd_d&gt; Enter (proc=0x40ad05a4)<br />@0,205,349us: [+0 T:0x40ad0b60 S:0x40ad050c] ti.sdo.ce.osal.Sem - Entered Sem_pend&gt; sem[0x3e4a0] timeout[0xffffffff]<br />@0,205,682us: [+6 T:0x40018060 S:0xbefff974] CE - Engine_init&gt; CE debugging on (CE_DEBUG=3; allowed CE_DEBUG levels: 1=min, 2=good, 3=max)<br />@0,205,859us: [+0 T:0x40018060 S:0xbefff964] OG - Global_atexit&gt; enter (fxn=0x103c8)<br />@0,206,012us: [+0 T:0x40018060 S:0xbefff944] OM - Memory_alloc&gt; Enter(0x18)<br />@0,206,163us: [+0 T:0x40018060 S:0xbefff944] OM - Memory_alloc&gt; return (0x3e6c8)<br />@0,206,304us: [+0 T:0x40018060 S:0xbefff944] OM - Memory_alloc&gt; Enter(0x18)<br />@0,206,447us: [+0 T:0x40018060 S:0xbefff944] OM - Memory_alloc&gt; return (0x3e6e8)<br />@0,206,582us: [+0 T:0x40018060 S:0xbefff944] OM - Memory_alloc&gt; Enter(0x18)<br />@0,206,723us: [+0 T:0x40018060 S:0xbefff944] OM - Memory_alloc&gt; return (0x3e708)<br />@0,206,936us: [+0 T:0x40018060 S:0xbefff974] CS - Server_init()<br />@0,207,097us: [+0 T:0x40018060 S:0xbefff974] CS - Server_init&gt; Global_useLinkArbiter = 0<br />@0,207,245us: [+0 T:0x40018060 S:0xbefff974] OG - Global_atexit&gt; enter (fxn=0xef18)<br />@0,207,482us: [+0 T:0x40018060 S:0xbefff984] OG - Global_atexit&gt; enter (fxn=0xcf14)<br />APP----------------------&gt;CE Runtime Initialization Done<br />@0,207,845us: [+0 T:0x40018060 S:0xbefff924] CE - Engine_open&gt; Enter(&#39;encodeCombo&#39;, 0x0, 0xbefff96c)<br />@0,208,021us: [+0 T:0x40018060 S:0xbefff90c] OM - Memory_alloc&gt; Enter(0x2c)<br />@0,208,178us: [+0 T:0x40018060 S:0xbefff90c] OM - Memory_alloc&gt; return (0x3e788)<br />@0,208,321us: [+0 T:0x40018060 S:0xbefff924] CE - rserverOpen(&#39;encodeCombo.x64P&#39;), count = 0<br />@0,208,462us: [+0 T:0x40018060 S:0xbefff8ec] OP - Processor_create&gt; Enter(imageName=&#39;encodeCombo.x64P&#39;, linkCfg=&#39;(null)&#39;, attrs=0xbefff970)<br />@0,209,442us: [+0 T:0x40018060 S:0xbefff8d4] OM - Memory_alloc&gt; Enter(0x24)<br />@0,209,638us: [+0 T:0x40018060 S:0xbefff8d4] OM - Memory_alloc&gt; return (0x3e7b8)<br />@0,209,789us: [+0 T:0x40018060 S:0xbefff8cc] OP - doCmd&gt; Enter (cmdId=1, proc=0x3e7b8)<br />@0,209,932us: [+0 T:0x40018060 S:0xbefff8bc] ti.sdo.ce.osal.Sem - Entered Sem_post&gt; sem[0x3e4a0]<br />@0,210,194us: [+0 T:0x40018060 S:0xbefff8cc] ti.sdo.ce.osal.Sem - Leaving Sem_post&gt; sem[0x3e4a0]<br />@0,210,359us: [+0 T:0x40018060 S:0xbefff8ac] ti.sdo.ce.osal.Sem - Entered Sem_pend&gt; sem[0x3e4b8] timeout[0xffffffff]<br />@0,210,551us: [+0 T:0x40ad0b60 S:0x40ad050c] ti.sdo.ce.osal.Sem - Leaving Sem_pend&gt; sem[0x3e4a0] status[0]<br />@0,210,716us: [+0 T:0x40ad0b60 S:0x40ad052c] OP - getCmd_d&gt; Exit (result=1)<br />@0,210,861us: [+0 T:0x40ad0b60 S:0x40ad052c] OP - Processor_create_d&gt; Enter(proc=0x3e7b8)<br />@0,211,005us: [+2 T:0x40ad0b60 S:0x40ad052c] OP - Processor_create_d&gt; Initializing DSP PROC...<br />@0,211,159us: [+2 T:0x40ad0b60 S:0x40ad052c] OP - Processor_create_d&gt; Using DspLink config data for entry #0 [server &#39;encodeCombo.x64P&#39;]<br />@0,211,309us: [+0 T:0x40ad0b60 S:0x40ad0514] OM - Memory_alloc&gt; Enter(0xe0)<br />@0,211,462us: [+0 T:0x40ad0b60 S:0x40ad0514] OM - Memory_alloc&gt; return (0x3e7e0)<br />@0,211,644us: [+2 T:0x40ad0b60 S:0x40ad052c] OP - Processor_create_d&gt; Adding DSP segment #0 to Link configuration: name=&#39;DDR2&#39;, startAddress=0x8fa00000, sizeInBytes=0x400000, shared=1<br />@0,211,826us: [+2 T:0x40ad0b60 S:0x40ad052c] OP - Processor_create_d&gt; Adding DSP segment #1 to Link configuration: name=&#39;DSPLINKMEM&#39;, startAddress=0x8fe00000, sizeInBytes=0x100000, shared=1<br />@0,211,992us: [+2 T:0x40ad0b60 S:0x40ad052c] OP - Processor_create_d&gt; Adding DSP segment #2 to Link configuration: name=&#39;RESETCTRL&#39;, startAddress=0x8ff00000, sizeInBytes=0x80, shared=0<br />@0,212,153us: [+2 T:0x40ad0b60 S:0x40ad052c] OP - Processor_create_d&gt; Adding DSP segment #3 to Link configuration: name=&#39;DDRALGHEAP&#39;, startAddress=0x8ba00000, sizeInBytes=0x4000000, shared=0<br />@0,212,315us: [+2 T:0x40ad0b60 S:0x40ad052c] OP - Processor_create_d&gt; DOPOWERCONTROL was=0; now=0<br />@0,218,807us: [+2 T:0x40ad0b60 S:0x40ad052c] OP - Processor_create_d&gt; Attaching to DSP PROC...<br />@0,227,620us: [+2 T:0x40ad0b60 S:0x40ad052c] OP - Processor_create_d&gt; Opening MSGQ pool...<br />@0,228,200us: [+2 T:0x40ad0b60 S:0x40ad052c] OP - Processor_create_d&gt; Loading encodeCombo.x64P on DSP (1 args)...<br />@0,295,540us: [+2 T:0x40ad0b60 S:0x40ad052c] OP - Processor_create_d&gt; Starting DSP PROC...<br />@0,322,636us: [+2 T:0x40ad0b60 S:0x40ad052c] OP - Processor_create_d&gt; Opening remote transport...<br />@0,323,193us: [+2 T:0x40ad0b60 S:0x40ad052c] OP - Processor_create_d&gt; return (1)<br />@0,323,385us: [+0 T:0x40ad0b60 S:0x40ad051c] ti.sdo.ce.osal.Sem - Entered Sem_post&gt; sem[0x3e4b8]<br />@0,323,582us: [+0 T:0x40018060 S:0xbefff8ac] ti.sdo.ce.osal.Sem - Leaving Sem_pend&gt; sem[0x3e4b8] status[0]<br />@0,323,748us: [+0 T:0x40018060 S:0xbefff8cc] OP - doCmd&gt; Exit (result=1)<br />@0,323,887us: [+0 T:0x40018060 S:0xbefff8ec] OP - Processor_create&gt; return (0x3e7b8)<br />@0,324,026us: [+0 T:0x40018060 S:0xbefff924] CE - rserverOpen(&#39;encodeCombo.x64P&#39;): 0x3d3e8 done.<br />@0,324,179us: [+0 T:0x40018060 S:0xbefff90c] OM - Memory_alloc&gt; Enter(0x1f)<br />@0,324,326us: [+0 T:0x40018060 S:0xbefff90c] OM - Memory_alloc&gt; return (0x3e998)<br />@0,324,580us: [+0 T:0x40018060 S:0xbefff8fc] OC - Comm_create&gt; Enter(queueName=&#39;encodeCombo_0&#39;, queue=0x3e798, attrs=0x0)<br />@0,324,747us: [+0 T:0x40018060 S:0xbefff8e4] OM - Memory_alloc&gt; Enter(0x4)<br />@0,324,896us: [+0 T:0x40018060 S:0xbefff8e4] OM - Memory_alloc&gt; return (0x3e9c0)<br />@0,325,326us: [+0 T:0x40018060 S:0xbefff8fc] OC - Comm_create&gt; return (0x3e9c0)<br />@0,325,565us: [+0 T:0x40018060 S:0xbefff8fc] OM - Memory_free&gt; Enter(0x3e998, 0x1f)<br />@0,325,775us: [+0 T:0x40018060 S:0xbefff8fc] OM - Memory_free&gt; return (0x1)<br />@0,325,934us: [+0 T:0x40018060 S:0xbefff904] OC - Comm_alloc&gt; Enter(poolId=0x0, msg=0x3e7a4, size=576)<br />@0,326,123us: [+0 T:0x40018060 S:0xbefff904] OC - Comm_alloc&gt; msg=0x412df880, returning (0)<br />@0,326,275us: [+0 T:0x40018060 S:0xbefff8e4] OC - Comm_locate&gt; Enter(queueName=&#39;rmsq&#39;, queue=0x3e794)<br />@0,332,201us: [+0 T:0x40018060 S:0xbefff8e4] OC - Comm_locate&gt; return (0)<br />@0,332,390us: [+0 T:0x40018060 S:0xbefff924] CE - checkServer(0x3e788)<br />@0,332,560us: [+0 T:0x40018060 S:0xbefff8f4] OC - Comm_put&gt; Enter(queue=0x0, msg=0x412df880)<br />@0,332,763us: [+0 T:0x40018060 S:0xbefff8f4] OC - Comm_put&gt; return (0)<br />@0,332,981us: [+0 T:0x40018060 S:0xbefff8ec] OC - Comm_get&gt; Enter(queue=0x10000, msg=0xbefff968, timeout=-1)<br />@0,333,161us: [+0 T:0x40018060 S:0xbefff8ec] OC - Comm_get&gt; MSGQ_Get() status=0x8000, return (0)<br />@0,333,323us: [+0 T:0x40018060 S:0xbefff924] CE - rmsInit&gt; RMS initialized(0x3e788); CE_DEBUG on, setting DSP trace mask to *+01234567,GT_prefix=12345,GT_time=3<br />@0,333,480us: [+0 T:0x40018060 S:0xbefff8f4] CE - Engine_setTrace&gt; Enter(engine=0x3e788, mask=&#39;*+01234567,GT_prefix=12345,GT_time=3&#39;)<br />@0,333,650us: [+1 T:0x40018060 S:0xbefff8f4] CE - Engine_setTrace&gt; Requesting DSP set trace ...<br />@0,333,787us: [+0 T:0x40018060 S:0xbefff8c4] OC - Comm_put&gt; Enter(queue=0x0, msg=0x412df880)<br />@0,333,972us: [+0 T:0x40018060 S:0xbefff8c4] OC - Comm_put&gt; return (0)<br />@0,334,123us: [+0 T:0x40018060 S:0xbefff8bc] OC - Comm_get&gt; Enter(queue=0x10000, msg=0xbefff92c, timeout=-1)<br />@0,334,311us: [+0 T:0x40ad0b60 S:0x40ad052c] ti.sdo.ce.osal.Sem - Leaving Sem_post&gt; sem[0x3e4b8]<br />@0,334,473us: [+0 T:0x40ad0b60 S:0x40ad052c] OP - getCmd_d&gt; Enter (proc=0x40ad05a4)<br />@0,334,618us: [+0 T:0x40ad0b60 S:0x40ad050c] ti.sdo.ce.osal.Sem - Entered Sem_pend&gt; sem[0x3e4a0] timeout[0xffffffff]<br />@0,335,693us: [+0 T:0x40018060 S:0xbefff8bc] OC - Comm_get&gt; MSGQ_Get() status=0x8000, return (0)<br />@0,335,867us: [+0 T:0x40018060 S:0xbefff8f4] CE - Engine_setTrace&gt; return(0)<br />@0,336,039us: [+0 T:0x40018060 S:0xbefff884] OC - Comm_put&gt; Enter(queue=0x0, msg=0x412df880)<br />@0,336,237us: [+0 T:0x40018060 S:0xbefff884] OC - Comm_put&gt; return (0)<br />@0,336,444us: [+0 T:0x40018060 S:0xbefff87c] OC - Comm_get&gt; Enter(queue=0x10000, msg=0xbefff910, timeout=-1)<br />@0,336,627us: [+0 T:0x40018060 S:0xbefff87c] OC - Comm_get&gt; MSGQ_Get() status=0x8000, return (0)<br />[DSP] @0,026,479tk: [+0 T:0x8ba0006c S:0x8ba03fdc] OG - Global_setSpecialTrace&gt; enter(mask=&#39;*+01234567,GT_prefix=12345,GT_time=3&#39;)<br />[DSP] @0,026,588tk: [+4 T:0x8ba0006c S:0x8ba03fdc] OG - Global_setSpecialTrace&gt; This program was built with the following packages:<br />[DSP] @0,026,664tk: [+4 T:0x8ba0006c S:0x8ba03fdc] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.targets.rts6000 (/home/bh/dvsdk_1_40_02_33/xdctools_3_15_01_59/packages/ti/targets/rts6000/) [1, 0, 0, 0]<br />[DSP] @0,026,762tk: [+4 T:0x8ba0006c S:0x8ba03fdc] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.sdo.codecs.aacenc (/home/bh/dvsdk_1_40_02_33/audio_transcode/packages/ti/sdo/codecs/aacenc/) [1, 0, 0]<br />[DSP] @0,026,858tk: [+4 T:0x8ba0006c S:0x8ba03fdc] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.sdo.fc.ires.hdvicp (/home/bh/dvsdk_1_40_02_33/framework_components_2_10_02/packages/ti/sdo/fc/ires/hdvicp/) [1, 0, 0]<br />[DSP] @0,026,961tk: [+4 T:0x8ba0006c S:0x8ba03fdc] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.sdo.fc.hdintc (/home/bh/dvsdk_1_40_02_33/framework_components_2_10_02/packages/ti/sdo/fc/hdintc/) [1, 0, 3]<br />[DSP] @0,027,060tk: [+4 T:0x8ba0006c S:0x8ba03fdc] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.sdo.edma3.rm (/home/bh/dvsdk_1_40_02_33/framework_components_2_10_02/fctools/packages/ti/sdo/edma3/rm/) [1, 03, 02]<br />[DSP] @0,027,162tk: [+4 T:0x8ba0006c S:0x8ba03fdc] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.sdo.utils.trace (/home/bh/dvsdk_1_40_02_33/framework_components_2_10_02/packages/ti/sdo/utils/trace/) [1, 0, 0]<br />[DSP] @0,027,262tk: [+4 T:0x8ba0006c S:0x8ba03fdc] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.sdo.fc.ires.nullresource (/home/bh/dvsdk_1_40_02_33/framework_components_2_10_02/packages/ti/sdo/fc/ires/nullresource/) [1, 0, 0]<br />[DSP] @0,027,372tk: [+4 T:0x8ba0006c S:0x8ba03fdc] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.rtdx (/home/bh/dvsdk_1_40_02_33/bios_5_33_04/packages/ti/rtdx/) [2, 0, 0, 4]<br />[DSP] @0,027,455tk: [+4 T:0x8ba0006c S:0x8ba03fdc] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.psl (/home/bh/dvsdk_1_40_02_33/bios_5_33_04/packages/ti/psl/) [5, 0, 0, 0]<br />[DSP] @0,027,538tk: [+4 T:0x8ba0006c S:0x8ba03fdc] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.bios (/home/bh/dvsdk_1_40_02_33/bios_5_33_04/packages/ti/bios/) [5, 2, 5, 9]<br />[DSP] @0,027,621tk: [+4 T:0x8ba0006c S:0x8ba03fdc] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.sdo.fc.dskt2 (/home/bh/dvsdk_1_40_02_33/framework_components_2_10_02/packages/ti/sdo/fc/dskt2/) [1, 0, 4]<br />[DSP] @0,027,719tk: [+4 T:0x8ba0006c S:0x8ba03fdc] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.sdo.fc.rman (/home/bh/dvsdk_1_40_02_33/framework_components_2_10_02/packages/ti/sdo/fc/rman/) [2, 0, 0]<br />[DSP] @0,027,815tk: [+4 T:0x8ba0006c S:0x8ba03fdc] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.sdo.fc.edma3 (/home/bh/dvsdk_1_40_02_33/framework_components_2_10_02/packages/ti/sdo/fc/edma3/) [2, 0, 0]<br />[DSP] @0,027,913tk: [+4 T:0x8ba0006c S:0x8ba03fdc] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.sdo.fc.ires.edma3chan (/home/bh/dvsdk_1_40_02_33/framework_components_2_10_02/packages/ti/sdo/fc/ires/edma3chan/) [1, 0, 0]<br />[DSP] @0,028,019tk: [+4 T:0x8ba0006c S:0x8ba03fdc] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.xdais.dm (/home/bh/dvsdk_1_40_02_33/xdais_6_10_01/packages/ti/xdais/dm/) [1, 0, 4]<br />[DSP] @0,028,105tk: [+4 T:0x8ba0006c S:0x8ba03fdc] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.xdais (/home/bh/dvsdk_1_40_02_33/xdais_6_10_01/packages/ti/xdais/) [1, 2.0, 1]<br />[DSP] @0,028,190tk: [+4 T:0x8ba0006c S:0x8ba03fdc] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.sdo.ce.node (/home/bh/dvsdk_1_40_02_33/codec_engine_2_10_02/packages/ti/sdo/ce/node/) [1, 0, 0]<br />[DSP] @0,028,282tk: [+4 T:0x8ba0006c S:0x8ba03fdc] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.sdo.ce.ipc.dsplink.dsp (/home/bh/dvsdk_1_40_02_33/codec_engine_2_10_02/packages/ti/sdo/ce/ipc/dsplink/dsp/) [2, 0, 1]<br />[DSP] @0,028,398tk: [+4 T:0x8ba0006c S:0x8ba03fdc] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.sdo.ce.utils.xdm (/home/bh/dvsdk_1_40_02_33/codec_engine_2_10_02/packages/ti/sdo/ce/utils/xdm/) [1, 0, 1]<br />[DSP] @0,028,495tk: [+4 T:0x8ba0006c S:0x8ba03fdc] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.sdo.fc.dman3 (/home/bh/dvsdk_1_40_02_33/framework_components_2_10_02/packages/ti/sdo/fc/dman3/) [1, 0, 3]<br />[DSP] @0,028,593tk: [+4 T:0x8ba0006c S:0x8ba03fdc] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.sdo.fc.acpy3 (/home/bh/dvsdk_1_40_02_33/framework_components_2_10_02/packages/ti/sdo/fc/acpy3/) [1, 0, 2]<br />[DSP] @0,028,690tk: [+4 T:0x8ba0006c S:0x8ba03fdc] OG -&nbsp;&nbsp;&nbsp;&nbsp; package dsplink.dsp (/home/bh/dvsdk_1_40_02_33/dsplink-davinci-v1.50-prebuilt/packages/dsplink/dsp/) [1, 3, 0]<br />[DSP] @0,028,785tk: [+4 T:0x8ba0006c S:0x8ba03fdc] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.bios.utils (<a>/home/bh/dvsdk_1_4@0,342,286us</a>: [+0 T:0x40018060 S:0xbefff884] OC - Comm_put&gt; Enter(queue=0x0, msg=0x412df880)<br />@0,342,501us: [+0 T:0x40018060 S:0xbefff884] OC - Comm_put&gt; return (0)<br />@0,342,718us: [+0 T:0x40018060 S:0xbefff87c] OC - Comm_get&gt; Enter(queue=0x10000, msg=0xbefff910, timeout=-1)<br />@0,342,899us: [+0 T:0x40018060 S:0xbefff87c] OC - Comm_get&gt; MSGQ_Get() status=0x8000, return (0)<br />0_02_33/biosutils_1_01_00/packages/ti/bios/utils/) [2, 0, 1, 00]<br />[DSP] @0,028,877tk: [+4 T:0x8ba0006c S:0x8ba03fdc] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.catalog.c6000 (/home/bh/dvsdk_1_40_02_33/xdctools_3_15_01_59/packages/ti/catalog/c6000/) [1, 0, 0, 0]<br />[DSP] @0,028,972tk: [+4 T:0x8ba0006c S:0x8ba03fdc] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.catalog (/home/bh/dvsdk_1_40_02_33/xdctools_3_15_01_59/packages/ti/catalog/) [1, 0, 0]<br />[DSP] @0,029,061tk: [+4 T:0x8ba0006c S:0x8ba03fdc] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.platforms.evmDM6467 (/home/bh/dvsdk_1_40_02_33/bios_5_33_04/packages/ti/platforms/evmDM6467/) [1, 0, 0, 0]<br />[DSP] @0,029,158tk: [+4 T:0x8ba0006c S:0x8ba03fdc] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.sdo.ce.osal (/home/bh/dvsdk_1_40_02_33/codec_engine_2_10_02/packages/ti/sdo/ce/osal/) [2, 0, 2]<br />[DSP] @0,029,251tk: [+4 T:0x8ba0006c S:0x8ba03fdc] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.sdo.ce.osal.bios (/home/bh/dvsdk_1_40_02_33/codec_engine_2_10_02/packages/ti/sdo/ce/osal/bios/) [2, 0, 1]<br />[DSP] @0,029,348tk: [+4 T:0x8ba0006c S:0x8ba03fdc] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.sdo.ce.ipc (/home/bh/dvsdk_1_40_02_33/codec_engine_2_10_02/packages/ti/sdo/ce/ipc/) [2, 0, 1]<br />[DSP] @0,029,440tk: [+4 T:0x8ba0006c S:0x8ba03fdc] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.sdo.ce.ipc.bios (/home/bh/dvsdk_1_40_02_33/codec_engine_2_10_02/packages/ti/sdo/ce/ipc/bios/) [2, 0, 1]<br />[DSP] @0,029,536tk: [+4 T:0x8ba0006c S:0x8ba03fdc] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.sdo.ce.alg (/home/bh/dvsdk_1_40_02_33/codec_engine_2_10_02/packages/ti/sdo/ce/alg/) [1, 0, 1]<br />[DSP] @0,029,628tk: [+4 T:0x8ba0006c S:0x8ba03fdc] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.sdo.ce (/home/bh/dvsdk_1_40_02_33/codec_engine_2_10_02/packages/ti/sdo/ce/) [1, 0, 6]<br />[DSP] @0,029,716tk: [+4 T:0x8ba0006c S:0x8ba03fdc] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.sdo.ce.bioslog (/home/bh/dvsdk_1_40_02_33/codec_engine_2_10_02/packages/ti/sdo/ce/bioslog/) [1, 0, 1]<br />[DSP] @0,029,811tk: [+4 T:0x8ba0006c S:0x8ba03fdc] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.sdo.ce.audio (/home/bh/dvsdk_1_40_02_33/codec_engine_2_10_02/packages/ti/sdo/ce/audio/) [1, 0, 2]<br />[DSP] @0,029,905tk: [+4 T:0x8ba0006c S:0x8ba03fdc] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.sdo.codecs.aacenc.ce (/home/bh/dvsdk_1_40_02_33/audio_transcode/packages/ti/sdo/codecs/aacenc/ce/) [1, 0, 0]<br />[DSP] @0,030,004tk: [+4 T:0x8ba0006c S:0x8ba03fdc] OG -&nbsp;&nbsp;&nbsp;&nbsp; package ti.sdo.servers.encode (/home/bh/dvsdk_1_40_02_33/audio_transcode/packages/ti/sdo/servers/encode/) []<br />[DSP] @0,030,097tk: [+0 T:0x8ba0006c S:0x8ba03fdc] OG - Global_setSpecialTrace&gt; return<br />[DSP] @0,031,701tk: [+0 T:0x8ba0006c S:0x8ba04024] CR - processRmsCmd(0x8fe038a8, 4056): cmd = 5<br />[DSP] @0,031,767tk: [+0 T:0x8ba0006c S:0x8ba04024] CR - remote time = 0x0, trace buffer size = 4032<br />[DSP] @0,046,222tk: [+0 T:0x8ba0006c S:0x8ba04024] CR - processRmsCmd(0x8fe038a8, 4056): cmd = 5<br />[DSP] @0,046,286tk: [+0 T:0x8ba0006c S:0x8ba04024] CR - remote time = 0x0, trace buffer size = 4032<br />@0,346,625us: [+0 T:0x40018060 S:0xbefff8b4] CE - Engine_fwriteTrace&gt; returning count [6934]<br />@0,346,776us: [+0 T:0x40018060 S:0xbefff924] CE - Engine_open&gt; return(255880)<br />APP----------------------&gt;Engine opened successfully<br />@0,347,045us: [+0 T:0x40018060 S:0xbefff974] ti.sdo.ce.audio.AUDENC - AUDENC_create&gt; Enter (engine=0x3e788, name=&#39;aacenc&#39;, params=0xbefffb70)<br />@0,347,252us: [+0 T:0x40018060 S:0xbefff944] CV - VISA_create(0x3e788, &#39;aacenc&#39;, 0xbefffb70, 0x572, &#39;ti.sdo.ce.audio.IAUDENC&#39;)<br />@0,347,417us: [+0 T:0x40018060 S:0xbefff86c] CV - VISA_create2(0x3e788, &#39;aacenc&#39;, 0xbefffb70, 0x4c, 0x572, &#39;ti.sdo.ce.audio.IAUDENC&#39;)<br />@0,347,632us: [+0 T:0x40018060 S:0xbefff854] OM - Memory_alloc&gt; Enter(0x30)<br />@0,347,792us: [+0 T:0x40018060 S:0xbefff854] OM - Memory_alloc&gt; return (0x3ea20)<br />@0,347,938us: [+0 T:0x40018060 S:0xbefff7fc] CE - Engine_createNode(0x3e788, &#39;aacenc&#39;, 572, 0xbefffb70, 0x4c, 0xbefff970)<br />@0,348,092us: [+0 T:0x40018060 S:0xbefff7e4] OM - Memory_alloc&gt; Enter(0x20)<br />@0,348,236us: [+0 T:0x40018060 S:0xbefff7e4] OM - Memory_alloc&gt; return (0x3e998)<br />@0,348,395us: [+0 T:0x40018060 S:0xbefff7d4] OC - Comm_create&gt; Enter(queueName=&#39;gppfromnode_1&#39;, queue=0x3e9a0, attrs=0x0)<br />@0,348,541us: [+0 T:0x40018060 S:0xbefff7bc] OM - Memory_alloc&gt; Enter(0x4)<br />@0,348,685us: [+0 T:0x40018060 S:0xbefff7bc] OM - Memory_alloc&gt; return (0x3ea58)<br />@0,349,122us: [+0 T:0x40018060 S:0xbefff7d4] OC - Comm_create&gt; return (0x3ea58)<br />@0,349,319us: [+0 T:0x40018060 S:0xbefff7dc] OC - Comm_put&gt; Enter(queue=0x0, msg=0x412df880)<br />@0,349,526us: [+0 T:0x40018060 S:0xbefff7dc] OC - Comm_put&gt; return (0)<br />@0,349,680us: [+0 T:0x40018060 S:0xbefff7d4] OC - Comm_get&gt; Enter(queue=0x10000, msg=0xbefff854, timeout=-1)<br />@0,355,854us: [+0 T:0x40018060 S:0xbefff7d4] OC - Comm_get&gt; MSGQ_Get() status=0x8000, return (0)<br />@0,356,038us: [+0 T:0x40018060 S:0xbefff7e4] OC - Comm_delete&gt; Enter (comm=0x3ea58)<br />@0,356,454us: [+0 T:0x40018060 S:0xbefff7bc] OM - Memory_free&gt; Enter(0x3ea58, 0x4)<br />@0,356,654us: [+0 T:0x40018060 S:0xbefff7bc] OM - Memory_free&gt; return (0x1)<br />@0,356,800us: [+0 T:0x40018060 S:0xbefff7f4] OC - Comm_delete&gt; return<br />@0,356,932us: [+0 T:0x40018060 S:0xbefff7d4] OM - Memory_free&gt; Enter(0x3e998, 0x20)<br />@0,357,074us: [+0 T:0x40018060 S:0xbefff7d4] OM - Memory_free&gt; return (0x1)<br />@0,357,209us: [+6 T:0x40018060 S:0xbefff7fc] CE - Engine_createNode&gt; Remote node creation FAILED (0x80008008).<br />@0,357,365us: [+0 T:0x40018060 S:0xbefff75c] OC - Comm_put&gt; Enter(queue=0x0, msg=0x412df880)<br />@0,357,615us: [+0 T:0x40018060 S:0xbefff75c] OC - Comm_put&gt; return (0)<br />@0,357,837us: [+0 T:0x40018060 S:0xbefff754] OC - Comm_get&gt; Enter(queue=0x10000, msg=0xbefff7e8, timeout=-1)<br />@0,358,023us: [+0 T:0x40018060 S:0xbefff754] OC - Comm_get&gt; MSGQ_Get() status=0x8000, return (0)<br />[DSP] @0,062,525tk: [+0 T:0x8ba0006c S:0x8ba04024] CR - processRmsCmd(0x8fe038a8, 4056): cmd = 0<br />[DSP] @0,062,597tk: [+0 T:0x8ba0006c S:0x8ba03f14] OM - Memory_alloc&gt; Enter(size=0x18)<br />[DSP] @0,062,661tk: [+0 T:0x8ba0006c S:0x8ba03f14] OM - Memory_alloc&gt; return (0x8fab2b00)<br />[DSP] @0,062,719tk: [+0 T:0x8ba0006c S:0x8ba03f14] OM - Memory_alloc&gt; Enter(size=0x9)<br />[DSP] @0,062,774tk: [+0 T:0x8ba0006c S:0x8ba03f14] OM - Memory_alloc&gt; return (0x8fab2b18)<br />[DSP] @0,062,837tk: [+0 T:0x8ba0006c S:0x8ba03edc] OM - Memory_alloc&gt; Enter(size=0x20)<br />[DSP] @0,062,893tk: [+0 T:0x8ba0006c S:0x8ba03edc] OM - Memory_alloc&gt; return (0x8fab2b28)<br />[DSP] @0,062,953tk: [+0 T:0x8ba0006c S:0x8ba03eac] OM - Memory_alloc&gt; Enter(size=0x24)<br />[DSP] @0,063,009tk: [+0 T:0x8ba0006c S:0x8ba03eac] OM - Memory_alloc&gt; return (0x8fab2b48)<br />[DSP] @0,063,091tk: [+0 T:0x8ba0006c S:0x8ba03ec4] ti.sdo.ce.audio.AUDENC - AUDENC_create&gt; Enter (engine=0x0, name=&#39;aacenc&#39;, params=0x8fe038c0)<br />[DSP] @0,063,198tk: [+0 T:0x8ba0006c S:0x8ba03e8c] CV - VISA_create(0x0, &#39;aacenc&#39;, 0x8fe038c0, 0x572, &#39;ti.sdo.ce.audio.IAUDENC&#39;)<br />[DSP] @0,063,280tk: [+0 T:0x8ba0006c S:0x8ba03d7c] CV - VISA_create2(0x0, &#39;aacenc&#39;, 0x8fe038c0, 0x4c, 0x572, &#39;ti.sdo.ce.audio.IAUDENC&#39;)<br />[DSP] @0,063,375tk: [+0 T:0x8ba0006c S:0x8ba03d14] CE - Engine_open&gt; Enter(&#39;local&#39;, 0x8ba03d6c, 0x23c)<br />[DSP] @0,063,445tk: [+0 T:0x8ba0006c S:0x8ba03cf4] OM - Memory_alloc&gt; Enter(size=0x2c)<br />[DSP] @0,063,501tk: [+0 T:0x8ba0006c S:0x8ba03cf4] OM - Memory_alloc&gt; return (0x8fab2bb0)<br />[DSP] @0,063,566tk: [+0 T:0x8ba0006c S:0x8ba03d14] CE - Engine_open&gt; return(-1884607568)<br />[DSP] @0,063,633tk: [+0 T:0x8ba0006c S:0x8ba03d5c] OM - Memory_alloc&gt; Enter(size=0x30)<br />[DSP] @0,063,690tk: [+0 T:0x8ba0006c S:0x8ba03d5c] OM - Memory_alloc&gt; return (0x8fab2be0)<br />[DSP] @0,063,753tk: [+0 T:0x8ba0006c S:0x8ba03d34] ti.sdo.ce.alg.Algorithm - Algorithm_create&gt; Enter(fxns=0x8fab16e4, idma3Fxns=0x0, params=0x8fe038c0, attrs=0x8ba03e80)<br />[DSP] @0,063,857tk: [+0 T:0x8ba0006c S:0x8ba03d14] OM - Memory_alloc&gt; Enter(size=0x10)<br />[DSP] @0,063,912tk: [+0 T:0x8ba0006c S:0x8ba03d14] OM - Memory_alloc&gt; return (0x8fab2c10)<br />[DSP] @0,063,990tk: [+0 T:0x8ba0006c S:0x8ba03cf4] ti.sdo.fc.dskt2 - _DSKT2_init&gt; Enter<br />[DSP] @0,064,068tk: [+0 T:0x8ba0006c S:0x8ba03cf4] ti.sdo.fc.dskt2 - _DSKT2_init&gt; Exit<br />[DSP] @0,064,123tk: [+0 T:0x8ba0006c S:0x8ba03d04] ti.sdo.fc.dskt2 - DSKT2_createAlg&gt; Enter (scratchId=1, fxns=0x8fab16e4, parentAlg=0x0, params=0x8fe038c0)<br />[DSP] @0,064,222tk: [+0 T:0x8ba0006c S:0x8ba03c8c] ti.sdo.fc.dskt2 - _DSKT2_init&gt; Enter<br />[DSP] @0,064,276tk: [+0 T:0x8ba0006c S:0x8ba03c8c] ti.sdo.fc.dskt2 - _DSKT2_init&gt; Exit<br />[DSP] @0,064,330tk: [+0 T:0x8ba0006c S:0x8ba03c9c] ti.sdo.fc.dskt2 - DSKT2_createAlg3&gt; Enter (scratchId=1, fxns=0x8fab16e4, parentAlg=0x0, params=0x8fe038c0, extHeapId=-1881130816, singleHeap=1)<br />[DSP] @0,064,449tk: [+2 T:0x8ba0006c S:0x8ba03c9c] ti.sdo.fc.dskt2 - DSKT2_createAlg3&gt; DSKT2_AlgAttrs extHeapId -1 and singleHeap 0<br />[DSP] @0,064,533tk: [+2 T:0x8ba0006c S:0x8ba03c9c] ti.sdo.fc.dskt2 - DSKT2_createAlg3&gt; Num memory recs requested 9<br />[DSP] @0,064,605tk: [+2 T:0x8ba0006c S:0x8ba03c9c] ti.sdo.fc.dskt2 - DSKT2_createAlg3&gt; memTab allocated at 0x8fab2fb0 size=0xb4<br />[DSP] @0,064,686tk: [+2 T:0x8ba0006c S:0x8ba03c9c] ti.sdo.fc.dskt2 - DSKT2_createAlg3&gt; Num memory recs requested 9<br />[DSP] @0,064,758tk: [+4 T:0x8ba0006c S:0x8ba03c9c] ti.sdo.fc.dskt2 - DSKT2_createAlg3&gt; Requested memTab[0]: size=0x125f0, align=0x8, space=IALG_EXTERNAL, attrs=IALG_PERSIST<br />[DSP] @0,064,859tk: [+4 T:0x8ba0006c S:0x8ba03c9c] ti.sdo.fc.dskt2 - DSKT2_createAlg3&gt; Requested memTab[1]: size=0x800, align=0x4, space=IALG_EXTERNAL, attrs=IALG_PERSIST<br />[DSP] @0,064,957tk: [+4 T:0x8ba0006c S:0x8ba03c9c] ti.sdo.fc.dskt2 - DSKT2_createAlg3&gt; Requested memTab[2]: size=0x2910, align=0x8, space=IALG_EXTERNAL, attrs=IALG_PERSIST<br />[DSP] @0,065,056tk: [+4 T:0x8ba0006c S:0x8ba03c9c] ti.sdo.fc.dskt2 - DSKT2_createAlg3&gt; Requested memTab[3]: size=0x2bb8, align=0x8, space=IALG_EXTERNAL, attrs=IALG_PERSIST<br />[DSP] @0,065,154tk: [+4 T:0x8ba0006c S:0x8ba03c9c] ti.sdo.fc.dskt2 - DSKT2_createAlg3&gt; Requested memTab[4]: size=0x53f8, align=0x8, space=IALG_EXTERNAL, attrs=IALG_PERSIST<br />[DSP] @0,065,253tk: [+4 T:0x8ba0006c S:0x8ba03c9c] ti.sdo.fc.dskt2 - DSKT2_createAlg3&gt; <a href="mailto:Requested@0,363,907us">Requested@0,363,907us</a>: [+0 T:0x40018060 S:0xbefff75c] OC - Comm_put&gt; Enter(queue=0x0, msg=0x412df880)<br />@0,364,116us: [+0 T:0x40018060 S:0xbefff75c] OC - Comm_put&gt; return (0)<br />@0,364,326us: [+0 T:0x40018060 S:0xbefff754] OC - Comm_get&gt; Enter(queue=0x10000, msg=0xbefff7e8, timeout=-1)<br />@0,364,512us: [+0 T:0x40018060 S:0xbefff754] OC - Comm_get&gt; MSGQ_Get() status=0x8000, return (0)<br />&nbsp;memTab[5]: size=0x11f8, align=0x4, space=IALG_EXTERNAL, attrs=IALG_SCRATCH<br />[DSP] @0,065,352tk: [+4 T:0x8ba0006c S:0x8ba03c9c] ti.sdo.fc.dskt2 - DSKT2_createAlg3&gt; Requested memTab[6]: size=0x23e8, align=0x8, space=IALG_EXTERNAL, attrs=IALG_SCRATCH<br />[DSP] @0,065,451tk: [+4 T:0x8ba0006c S:0x8ba03c9c] ti.sdo.fc.dskt2 - DSKT2_createAlg3&gt; Requested memTab[7]: size=0x10a44, align=0x8, space=IALG_EXTERNAL, attrs=IALG_PERSIST<br />[DSP] @0,065,565tk: [+4 T:0x8ba0006c S:0x8ba03c9c] ti.sdo.fc.dskt2 - DSKT2_createAlg3&gt; Requested memTab[8]: size=0xc05c, align=0x8, space=IALG_EXTERNAL, attrs=IALG_PERSIST<br />[DSP] @0,065,663tk: [+6 T:0x8ba0006c S:0x8ba03c9c] ti.sdo.fc.dskt2 - DSKT2_createAlg3&gt; Scratch Memory requested by algorithm, but algActivate, algDeactivate functions not implemented.<br />[DSP] @0,065,764tk: [+0 T:0x8ba0006c S:0x8ba03c5c] ti.sdo.fc.dskt2 - _DSKT2_assignInstanceMemory&gt; Enter (scratchId=1, numRecs=9, extHeapId=0)<br />[DSP] @0,065,848tk: [+0 T:0x8ba0006c S:0x8ba03c3c] ti.sdo.fc.dskt2 - _DSKT2_usesInternalScratch&gt; Enter (numRecs=9)<br />[DSP] @0,065,918tk: [+0 T:0x8ba0006c S:0x8ba03c3c] ti.sdo.fc.dskt2 - _DSKT2_usesInternalScratch&gt; Exit (returnVal=0)<br />[DSP] @0,065,993tk: [+0 T:0x8ba0006c S:0x8ba03c1c] ti.sdo.fc.dskt2 - _DSKT2_allocateInDesignatedSpace&gt; Enter (index=0, ialgSpace=IALG_EXTERNAL, extHeapId=0)<br />[DSP] @0,066,799tk: [+0 T:0x8ba0006c S:0x8ba03c1c] ti.sdo.fc.dskt2 - _DSKT2_allocateInDesignatedSpace&gt; Exit (returnVal=1)<br />[DSP] @0,066,873tk: [+2 T:0x8ba0006c S:0x8ba03c5c] ti.sdo.fc.dskt2 - _DSKT2_assignInstanceMemory&gt; memTab[0] allocated in persistent memory in Memory space:IALG_EXTERNAL. Addr=0x8ba051e8<br />[DSP] @0,066,981tk: [+0 T:0x8ba0006c S:0x8ba03c1c] ti.sdo.fc.dskt2 - _DSKT2_allocateInDesignatedSpace&gt; Enter (index=1, ialgSpace=IALG_EXTERNAL, extHeapId=0)<br />[DSP] @0,067,094tk: [+0 T:0x8ba0006c S:0x8ba03c1c] ti.sdo.fc.dskt2 - _DSKT2_allocateInDesignatedSpace&gt; Exit (returnVal=1)<br />[DSP] @0,067,165tk: [+2 T:0x8ba0006c S:0x8ba03c5c] ti.sdo.fc.dskt2 - _DSKT2_assignInstanceMemory&gt; memTab[1] allocated in persistent memory in Memory space:IALG_EXTERNAL. Addr=0x8ba177d8<br />[DSP] @0,067,271tk: [+0 T:0x8ba0006c S:0x8ba03c1c] ti.sdo.fc.dskt2 - _DSKT2_allocateInDesignatedSpace&gt; Enter (index=2, ialgSpace=IALG_EXTERNAL, extHeapId=0)<br />[DSP] @0,067,473tk: [+0 T:0x8ba0006c S:0x8ba03c1c] ti.sdo.fc.dskt2 - _DSKT2_allocateInDesignatedSpace&gt; Exit (returnVal=1)<br />[DSP] @0,067,545tk: [+2 T:0x8ba0006c S:0x8ba03c5c] ti.sdo.fc.dskt2 - _DSKT2_assignInstanceMemory&gt; memTab[2] allocated in persistent memory in Memory space:IALG_EXTERNAL. Addr=0x8ba17fd8<br />[DSP] @0,067,650tk: [+0 T:0x8ba0006c S:0x8ba03c1c] ti.sdo.fc.dskt2 - _DSKT2_allocateInDesignatedSpace&gt; Enter (index=3, ialgSpace=IALG_EXTERNAL, extHeapId=0)<br />[DSP] @0,067,873tk: [+0 T:0x8ba0006c S:0x8ba03c1c] ti.sdo.fc.dskt2 - _DSKT2_allocateInDesignatedSpace&gt; Exit (returnVal=1)<br />[DSP] @0,067,948tk: [+2 T:0x8ba0006c S:0x8ba03c5c] ti.sdo.fc.dskt2 - _DSKT2_assignInstanceMemory&gt; memTab[3] allocated in persistent memory in Memory space:IALG_EXTERNAL. Addr=0x8ba1a8e8<br />[DSP] @0,068,055tk: [+0 T:0x8ba0006c S:0x8ba03c1c] ti.sdo.fc.dskt2 - _DSKT2_allocateInDesignatedSpace&gt; Enter (index=4, ialgSpace=IALG_EXTERNAL, extHeapId=0)<br />[DSP] @0,068,367tk: [+0 T:0x8ba0006c S:0x8ba03c1c] ti.sdo.fc.dskt2 - _DSKT2_allocateInDesignatedSpace&gt; Exit (returnVal=1)<br />[DSP] @0,068,438tk: [+2 T:0x8ba0006c S:0x8ba03c5c] ti.sdo.fc.dskt2 - _DSKT2_assignInstanceMemory&gt; memTab[4] allocated in persistent memory in Memory space:IALG_EXTERNAL. Addr=0x8ba1d4a0<br />[DSP] @0,068,547tk: [+0 T:0x8ba0006c S:0x8ba03c1c] ti.sdo.fc.dskt2 - _DSKT2_allocateInDesignatedSpace&gt; Enter (index=5, ialgSpace=IALG_EXTERNAL, extHeapId=0)<br />[DSP] @0,068,688tk: [+0 T:0x8ba0006c S:0x8ba03c1c] ti.sdo.fc.dskt2 - _DSKT2_allocateInDesignatedSpace&gt; Exit (returnVal=1)<br />[DSP] @0,068,759tk: [+2 T:0x8ba0006c S:0x8ba03c5c] ti.sdo.fc.dskt2 - _DSKT2_assignInstanceMemory&gt; memTab[5] allocated in persistent memory in Memory space:IALG_EXTERNAL. Addr=0x8ba22898<br />[DSP] @0,068,865tk: [+0 T:0x8ba0006c S:0x8ba03c1c] ti.sdo.fc.dskt2 - _DSKT2_allocateInDesignatedSpace&gt; Enter (index=6, ialgSpace=IALG_EXTERNAL, extHeapId=0)<br />[DSP] @0,069,051tk: [+0 T:0x8ba0006c S:0x8ba03c1c] ti.sdo.fc.dskt2 - <a href="mailto:_DSKT2_allocateInDesignatedS@0,370,085us">_DSKT2_allocateInDesignatedS@0,370,085us</a>: [+0 T:0x40018060 S:0xbefff75c] OC - Comm_put&gt; Enter(queue=0x0, msg=0x412df880)<br />@0,370,300us: [+0 T:0x40018060 S:0xbefff75c] OC - Comm_put&gt; return (0)<br />@0,370,512us: [+0 T:0x40018060 S:0xbefff754] OC - Comm_get&gt; Enter(queue=0x10000, msg=0xbefff7e8, timeout=-1)<br />@0,370,698us: [+0 T:0x40018060 S:0xbefff754] OC - Comm_get&gt; MSGQ_Get() status=0x8000, return (0)<br />pace&gt; Exit (returnVal=1)<br />[DSP] @0,069,122tk: [+2 T:0x8ba0006c S:0x8ba03c5c] ti.sdo.fc.dskt2 - _DSKT2_assignInstanceMemory&gt; memTab[6] allocated in persistent memory in Memory space:IALG_EXTERNAL. Addr=0x8ba23a90<br />[DSP] @0,069,228tk: [+0 T:0x8ba0006c S:0x8ba03c1c] ti.sdo.fc.dskt2 - _DSKT2_allocateInDesignatedSpace&gt; Enter (index=7, ialgSpace=IALG_EXTERNAL, extHeapId=0)<br />[DSP] @0,070,055tk: [+0 T:0x8ba0006c S:0x8ba03c1c] ti.sdo.fc.dskt2 - _DSKT2_allocateInDesignatedSpace&gt; Exit (returnVal=1)<br />[DSP] @0,070,156tk: [+2 T:0x8ba0006c S:0x8ba03c5c] ti.sdo.fc.dskt2 - _DSKT2_assignInstanceMemory&gt; memTab[7] allocated in persistent memory in Memory space:IALG_EXTERNAL. Addr=0x8ba25e78<br />[DSP] @0,070,264tk: [+0 T:0x8ba0006c S:0x8ba03c1c] ti.sdo.fc.dskt2 - _DSKT2_allocateInDesignatedSpace&gt; Enter (index=8, ialgSpace=IALG_EXTERNAL, extHeapId=0)<br />[DSP] @0,070,874tk: [+0 T:0x8ba0006c S:0x8ba03c1c] ti.sdo.fc.dskt2 - _DSKT2_allocateInDesignatedSpace&gt; Exit (returnVal=1)<br />[DSP] @0,070,947tk: [+2 T:0x8ba0006c S:0x8ba03c5c] ti.sdo.fc.dskt2 - _DSKT2_assignInstanceMemory&gt; memTab[8] allocated in persistent memory in Memory space:IALG_EXTERNAL. Addr=0x8ba368c0<br />[DSP] @0,071,057tk: [+0 T:0x8ba0006c S:0x8ba03c3c] ti.sdo.fc.dskt2 - _DSKT2_usesInternalScratch&gt; Enter (numRecs=9)<br />[DSP] @0,071,126tk: [+0 T:0x8ba0006c S:0x8ba03c3c] ti.sdo.fc.dskt2 - _DSKT2_usesInternalScratch&gt; Exit (returnVal=0)<br />[DSP] @0,071,194tk: [+0 T:0x8ba0006c S:0x8ba03c5c] ti.sdo.fc.dskt2 - _DSKT2_assignInstanceMemory&gt; Exit (returnVal=1)<br />[DSP] @0,071,269tk: [+4 T:0x8ba0006c S:0x8ba03c9c] ti.sdo.fc.dskt2 - DSKT2_createAlg3&gt; Allocated memTab[0]: base=0x8ba051e8, size=0x125f0, align=0x8, space=IALG_EXTERNAL, attrs=IALG_PERSIST<br />[DSP] @0,071,380tk: [+4 T:0x8ba0006c S:0x8ba03c9c] ti.sdo.fc.dskt2 - DSKT2_createAlg3&gt; Allocated memTab[1]: base=0x8ba177d8, size=0x800, align=0x4, space=IALG_EXTERNAL, attrs=IALG_PERSIST<br />[DSP] @0,071,489tk: [+4 T:0x8ba0006c S:0x8ba03c9c] ti.sdo.fc.dskt2 - DSKT2_createAlg3&gt; Allocated memTab[2]: base=0x8ba17fd8, size=0x2910, align=0x8, space=IALG_EXTERNAL, attrs=IALG_PERSIST<br />[DSP] @0,071,599tk: [+4 T:0x8ba0006c S:0x8ba03c9c] ti.sdo.fc.dskt2 - DSKT2_createAlg3&gt; Allocated memTab[3]: base=0x8ba1a8e8, size=0x2bb8, align=0x8, space=IALG_EXTERNAL, attrs=IALG_PERSIST<br />[DSP] @0,071,709tk: [+4 T:0x8ba0006c S:0x8ba03c9c] ti.sdo.fc.dskt2 - DSKT2_createAlg3&gt; Allocated memTab[4]: base=0x8ba1d4a0, size=0x53f8, align=0x8, space=IALG_EXTERNAL, attrs=IALG_PERSIST<br />[DSP] @0,071,818tk: [+4 T:0x8ba0006c S:0x8ba03c9c] ti.sdo.fc.dskt2 - DSKT2_createAlg3&gt; Allocated memTab[5]: base=0x8ba22898, size=0x11f8, align=0x4, space=IALG_EXTERNAL, attrs=IALG_PERSIST<br />[DSP] @0,071,928tk: [+4 T:0x8ba0006c S:0x8ba03c9c] ti.sdo.fc.dskt2 - DSKT2_createAlg3&gt; Allocated memTab[6]: base=0x8ba23a90, size=0x23e8, align=0x8, space=IALG_EXTERNAL, attrs=IALG_PERSIST<br />[DSP] @0,072,038tk: [+4 T:0x8ba0006c S:0x8ba03c9c] ti.sdo.fc.dskt2 - DSKT2_createAlg3&gt; Allocated memTab[7]: base=0x8ba25e78, size=0x10a44, align=0x8, space=IALG_EXTERNAL, attrs=IALG_PERSIST<br />[DSP] @0,072,148tk: [+4 T:0x8ba0006c S:0x8ba03c9c] ti.sdo.fc.dskt2 - DSKT2_createAlg3&gt; Allocated memTab[8]: base=0x8ba368c0, size=0xc05c, align=0x8, space=IALG_EXTERNAL, attrs=IALG_PERSIST<br />[DSP] @0,072,263tk: [+0 T:0x8ba0006c S:0x8ba03c64] ti.sdo.fc.dskt2 - _DSKT2_enqueueMemTab&gt; Enter (segId=1, memTabSize=180, numRecs=9, extHeapId=0)<br />[DSP] @0,072,377tk: [+0 T:0x8ba0006c S:0x8ba03c64] ti.sdo.fc.dskt2 - _DSKT2_enqueueMemTab&gt; Exit (status=TRUE)<br />[DSP] @0,072,882tk: [+7 T:0x8ba0006c S:0x8ba03c9c] ti.sdo.fc.dskt2 - DSKT2_createAlg3&gt; algInit call failed -1<br />[DSP] @0,072,957tk: [+0 T:0x8ba0006c S:0x8ba03c64] ti.sdo.fc.dskt2 - DSKT2_freeAlg&gt; Enter (scratchMutexId=1, alg=0x8ba051e8)<br />[DSP] @0,073,037tk: [+2 T:0x8ba0006c S:0x8ba03c64] ti.sdo.fc.dskt2 - DSKT2_freeAlg&gt; Dequeue alg&nbsp; information<br />[DSP] @0,073,102tk: [+0 T:0x8ba0006c S:0x8ba03c2c] ti.sdo.fc.dskt2 - _DSKT2_dequeueMemTab&gt; Enter (segId=1, alg=0x8ba051e8)<br />[DSP] @0,073,187tk: [+0 T:0x8ba0006c S:0x8ba03c2c] ti.sdo.fc.dskt2 - _DSKT2_dequeueMemTab&gt; Exit (memTab=0x8fab2fb0)<br />[DSP] @0,073,261tk: [+2 T:0x8ba0006c S:0x8ba03c64] ti.sdo.fc.dskt2 - DSKT2_freeAlg&gt; Dequeued alg information, memTab 0x8fab2fb0 memTabSize 180, numRecs 9, <a href="mailto:extHeapI@0,376,227us">extHeapI@0,376,227us</a>: [+0 T:0x40018060 S:0xbefff75c] OC - Comm_put&gt; Enter(queue=0x0, msg=0x412df880)<br />@0,376,427us: [+0 T:0x40018060 S:0xbefff75c] OC - Comm_put&gt; return (0)<br />@0,376,636us: [+0 T:0x40018060 S:0xbefff754] OC - Comm_get&gt; Enter(queue=0x10000, msg=0xbefff7e8, timeout=-1)<br />@0,376,821us: [+0 T:0x40018060 S:0xbefff754] OC - Comm_get&gt; MSGQ_Get() status=0x8000, return (0)<br />d 0<br />[DSP] @0,073,359tk: [+2 T:0x8ba0006c S:0x8ba03c64] ti.sdo.fc.dskt2 - DSKT2_freeAlg&gt; Free instance memory<br />[DSP] @0,073,423tk: [+0 T:0x8ba0006c S:0x8ba03c3c] ti.sdo.fc.dskt2 - _DSKT2_freeInstanceMemory&gt; Enter (scratchMutexId=1, numRecs=9, extHeapId=0)<br />[DSP] @0,073,507tk: [+0 T:0x8ba0006c S:0x8ba03c0c] ti.sdo.fc.dskt2 - _DSKT2_freeAllocatedMemory&gt; Enter (scratchMutexId=1, number=9, extHeapId=0)<br />[DSP] @0,073,592tk: [+0 T:0x8ba0006c S:0x8ba03bec] ti.sdo.fc.dskt2 - _DSKT2_isSharedScratchAddr&gt; Enter (scratchMutexId=1, addr=0x8ba051e8)<br />[DSP] @0,073,679tk: [+0 T:0x8ba0006c S:0x8ba03bec] ti.sdo.fc.dskt2 - _DSKT2_isSharedScratch&gt; Exit (status=0 )<br />[DSP] @0,073,747tk: [+0 T:0x8ba0006c S:0x8ba03bec] ti.sdo.fc.dskt2 - _DSKT2_isSharedScratchAddr&gt; Enter (scratchMutexId=1, addr=0x8ba177d8)<br />[DSP] @0,073,830tk: [+0 T:0x8ba0006c S:0x8ba03bec] ti.sdo.fc.dskt2 - _DSKT2_isSharedScratch&gt; Exit (status=0 )<br />[DSP] @0,073,897tk: [+0 T:0x8ba0006c S:0x8ba03bec] ti.sdo.fc.dskt2 - _DSKT2_isSharedScratchAddr&gt; Enter (scratchMutexId=1, addr=0x8ba17fd8)<br />[DSP] @0,073,980tk: [+0 T:0x8ba0006c S:0x8ba03bec] ti.sdo.fc.dskt2 - _DSKT2_isSharedScratch&gt; Exit (status=0 )<br />[DSP] @0,074,048tk: [+0 T:0x8ba0006c S:0x8ba03bec] ti.sdo.fc.dskt2 - _DSKT2_isSharedScratchAddr&gt; Enter (scratchMutexId=1, addr=0x8ba1a8e8)<br />[DSP] @0,074,130tk: [+0 T:0x8ba0006c S:0x8ba03bec] ti.sdo.fc.dskt2 - _DSKT2_isSharedScratch&gt; Exit (status=0 )<br />[DSP] @0,074,198tk: [+0 T:0x8ba0006c S:0x8ba03bec] ti.sdo.fc.dskt2 - _DSKT2_isSharedScratchAddr&gt; Enter (scratchMutexId=1, addr=0x8ba1d4a0)<br />[DSP] @0,074,281tk: [+0 T:0x8ba0006c S:0x8ba03bec] ti.sdo.fc.dskt2 - _DSKT2_isSharedScratch&gt; Exit (status=0 )<br />[DSP] @0,074,349tk: [+0 T:0x8ba0006c S:0x8ba03bec] ti.sdo.fc.dskt2 - _DSKT2_isSharedScratchAddr&gt; Enter (scratchMutexId=1, addr=0x8ba22898)<br />[DSP] @0,074,432tk: [+0 T:0x8ba0006c S:0x8ba03bec] ti.sdo.fc.dskt2 - _DSKT2_isSharedScratch&gt; Exit (status=0 )<br />[DSP] @0,074,499tk: [+0 T:0x8ba0006c S:0x8ba03bec] ti.sdo.fc.dskt2 - _DSKT2_isSharedScratchAddr&gt; Enter (scratchMutexId=1, addr=0x8ba23a90)<br />[DSP] @0,074,582tk: [+0 T:0x8ba0006c S:0x8ba03bec] ti.sdo.fc.dskt2 - _DSKT2_isSharedScratch&gt; Exit (status=0 )<br />[DSP] @0,074,650tk: [+0 T:0x8ba0006c S:0x8ba03bec] ti.sdo.fc.dskt2 - _DSKT2_isSharedScratchAddr&gt; Enter (scratchMutexId=1, addr=0x8ba25e78)<br />[DSP] @0,074,732tk: [+0 T:0x8ba0006c S:0x8ba03bec] ti.sdo.fc.dskt2 - _DSKT2_isSharedScratch&gt; Exit (status=0 )<br />[DSP] @0,074,806tk: [+0 T:0x8ba0006c S:0x8ba03bec] ti.sdo.fc.dskt2 - _DSKT2_isSharedScratchAddr&gt; Enter (scratchMutexId=1, addr=0x8ba368c0)<br />[DSP] @0,074,889tk: [+0 T:0x8ba0006c S:0x8ba03bec] ti.sdo.fc.dskt2 - _DSKT2_isSharedScratch&gt; Exit (status=0 )<br />[DSP] @0,074,958tk: [+0 T:0x8ba0006c S:0x8ba03c0c] ti.sdo.fc.dskt2 - _DSKT2_freeAllocatedMemory&gt; Exit (returnVal=1)<br />[DSP] @0,075,026tk: [+0 T:0x8ba0006c S:0x8ba03c1c] ti.sdo.fc.dskt2 - _DSKT2_usesInternalScratch&gt; Enter (numRecs=9)<br />[DSP] @0,075,095tk: [+0 T:0x8ba0006c S:0x8ba03c1c] ti.sdo.fc.dskt2 - _DSKT2_usesInternalScratch&gt; Exit (returnVal=0)<br />[DSP] @0,075,163tk: [+0 T:0x8ba0006c S:0x8ba03c3c] ti.sdo.fc.dskt2 - _DSKT2_freeInstanceMemory&gt; Exit (returnVal=1)<br />[DSP] @0,075,232tk: [+0 T:0x8ba0006c S:0x8ba03c64] ti.sdo.fc.dskt2 - DSKT2_freeAlg&gt; Exit<br />[DSP] @0,075,287tk: [+0 T:0x8ba0006c S:0x8ba03c9c] ti.sdo.fc.dskt2 - DSKT2_createAlg3&gt; Exit (algHandle=NULL)<br />[DSP] @0,075,354tk: [+0 T:0x8ba0006c S:0x8ba03d04] ti.sdo.fc.dskt2 - DSKT2_createAlg&gt; Exit (algHandle=0x0)<br />[DSP] @0,075,421tk: [+7 T:0x8ba0006c S:0x8ba03d34] ti.sdo.ce.alg.Algorithm - Algorithm_create&gt; Algorithm creation FAILED; make sure that 1) alg params are correct/appropriate, 2) there is enough internal and external algorithm memory available -- check DSKT2 settings for heap assignments and scratch allocation<br />[DSP] @0,075,584tk: [+0 T:0x8ba0006c S:0x8ba03d14] ti.sdo.ce.alg.Algorithm - Algorithm_delete&gt; Enter(handle=0x8fab2c10)<br />[DSP] @0,075,660tk: [+0 T:0x8ba0006c S:0x8ba03ce4] OM - Memory_free&gt; Enter(addr=0x8fab2c10, size=16)<br />[DSP] @0,075,726tk: [+0 T:0x8ba0006c S:0x8ba03ce4] OM - Memory_free&gt; return (0x1)<br />[DSP] @0,075,778tk: [+0 T:0x8ba0006c S:0x8ba03d14] ti.sdo.ce.alg.Algorithm - Algorithm_delete&gt; return<br />[DSP] @0,075,841tk: [+0 T:0x8ba0006c S:0x8ba03d34] ti.sdo.ce.alg.Algorithm - Algorithm_create&gt; return (0x0)<br />[DSP] @0,0@0,382,656us: [+0 T:0x40018060 S:0xbefff75c] OC - Comm_put&gt; Enter(queue=0x0, msg=0x412df880)<br />@0,382,860us: [+0 T:0x40018060 S:0xbefff75c] OC - Comm_put&gt; return (0)<br />@0,383,072us: [+0 T:0x40018060 S:0xbefff754] OC - Comm_get&gt; Enter(queue=0x10000, msg=0xbefff7e8, timeout=-1)<br />@0,383,257us: [+0 T:0x40018060 S:0xbefff754] OC - Comm_get&gt; MSGQ_Get() status=0x8000, return (0)<br />75,906tk: [+2 T:0x8ba0006c S:0x8ba03d7c] CV - VISA_create&gt; FAILED to create local codec.<br />[DSP] @0,075,968tk: [+0 T:0x8ba0006c S:0x8ba03d4c] CV - VISA_delete(0x8fab2be0)<br />[DSP] @0,076,023tk: [+5 T:0x8ba0006c S:0x8ba03d4c] CV - VISA_delete&gt; deleting codec (localQueue=0xffff, remoteQueue=0xffff)<br />[DSP] @0,076,099tk: [+0 T:0x8ba0006c S:0x8ba03d1c] OM - Memory_free&gt; Enter(addr=0x8fab2be0, size=48)<br />[DSP] @0,076,164tk: [+0 T:0x8ba0006c S:0x8ba03d1c] OM - Memory_free&gt; return (0x1)<br />[DSP] @0,076,217tk: [+0 T:0x8ba0006c S:0x8ba03ec4] ti.sdo.ce.audio.AUDENC - AUDENC_create&gt; return (0x0)<br />[DSP] @0,076,289tk: [+0 T:0x8ba0006c S:0x8ba03eb4] ti.sdo.ce.audio.AUDENC - AUDENC_delete&gt; Enter (handle=0x0)<br />[DSP] @0,076,357tk: [+0 T:0x8ba0006c S:0x8ba03e84] CV - VISA_delete(0x0)<br />[DSP] @0,076,404tk: [+0 T:0x8ba0006c S:0x8ba03eb4] ti.sdo.ce.audio.AUDENC - AUDENC_delete&gt; return<br />[DSP] @0,076,467tk: [+0 T:0x8ba0006c S:0x8ba03e9c] OM - Memory_free&gt; Enter(addr=0x8fab2b48, size=36)<br />[DSP] @0,076,533tk: [+0 T:0x8ba0006c S:0x8ba03e9c] OM - Memory_free&gt; return (0x1)<br />[DSP] @0,076,585tk: [+0 T:0x8ba0006c S:0x8ba03ea4] OM - Memory_free&gt; Enter(addr=0x8fab2b28, size=32)<br />[DSP] @0,076,650tk: [+0 T:0x8ba0006c S:0x8ba03ea4] OM - Memory_free&gt; return (0x1)<br />[DSP] @0,076,706tk: [+0 T:0x8ba0006c S:0x8ba03f24] OM - Memory_free&gt; Enter(addr=0x8fab2b18, size=9)<br />[DSP] @0,076,770tk: [+0 T:0x8ba0006c S:0x8ba03f24] OM - Memory_free&gt; return (0x1)<br />[DSP] @0,076,822tk: [+0 T:0x8ba0006c S:0x8ba03f24] OM - Memory_free&gt; Enter(addr=0x8fab2b00, size=24)<br />[DSP] @0,076,888tk: [+0 T:0x8ba0006c S:0x8ba03f24] OM - Memory_free&gt; return (0x1)<br />[DSP] @0,081,309tk: [+0 T:0x8ba0006c S:0x8ba04024] CR - processRmsCmd(0x8fe038a8, 4056): cmd = 5<br />[DSP] @0,081,374tk: [+0 T:0x8ba0006c S:0x8ba04024] CR - remote time = 0x0, trace buffer size = 4032<br />[DSP] @0,096,379tk: [+0 T:0x8ba0006c S:0x8ba04024] CR - processRmsCmd(0x8fe038a8, 4056): cmd = 5<br />[DSP] @0,096,442tk: [+0 T:0x8ba0006c S:0x8ba04024] CR - remote time = 0x0, trace buffer size = 4032<br />[DSP] @0,110,728tk: [+0 T:0x8ba0006c S:0x8ba04024] CR - processRmsCmd(0x8fe038a8, 4056): cmd = 5<br />[DSP] @0,110,792tk: [+0 T:0x8ba0006c S:0x8ba04024] CR - remote time = 0x0, trace buffer size = 4032<br />[DSP] @0,124,946tk: [+0 T:0x8ba0006c S:0x8ba04024] CR - processRmsCmd(0x8fe038a8, 4056): cmd = 5<br />[DSP] @0,125,010tk: [+0 T:0x8ba0006c S:0x8ba04024] CR - remote time = 0x0, trace buffer size = 4032<br />[DSP] @0,139,873tk: [+0 T:0x8ba0006c S:0x8ba04024] CR - processRmsCmd(0x8fe038a8, 4056): cmd = 5<br />[DSP] @0,139,937tk: [+0 T:0x8ba0006c S:0x8ba04024] CR - remote time = 0x0, trace buffer size = 4032<br />@0,386,956us: [+0 T:0x40018060 S:0xbefff78c] CE - Engine_fwriteTrace&gt; returning count [19461]<br />@0,387,108us: [+2 T:0x40018060 S:0xbefff7fc] CE - Engine_createNode&gt; Returning 0x0<br />@0,387,248us: [+2 T:0x40018060 S:0xbefff86c] CV - VISA_create&gt; FAILED to create remote codec (0x8).<br />@0,387,388us: [+0 T:0x40018060 S:0xbefff844] CV - VISA_delete(0x3ea20)<br />@0,387,522us: [+5 T:0x40018060 S:0xbefff844] CV - VISA_delete&gt; deleting codec (localQueue=0xffff, remoteQueue=0xffff)<br />@0,387,662us: [+0 T:0x40018060 S:0xbefff81c] OM - Memory_free&gt; Enter(0x3ea20, 0x30)<br />@0,387,803us: [+0 T:0x40018060 S:0xbefff81c] OM - Memory_free&gt; return (0x1)<br />@0,387,937us: [+0 T:0x40018060 S:0xbefff974] ti.sdo.ce.audio.AUDENC - AUDENC_create&gt; return (0x0)<br />Fail in aacenc Instance Creation<br />Close Codec Engine!<br />@0,388,159us: [+0 T:0x40018060 S:0xbefff974] CE - Engine_close(0x3e788)<br />@0,388,316us: [+0 T:0x40018060 S:0xbefff8d4] OC - Comm_put&gt; Enter(queue=0x0, msg=0x412df880)<br />@0,388,507us: [+0 T:0x40018060 S:0xbefff8d4] OC - Comm_put&gt; return (0)<br />@0,388,721us: [+0 T:0x40018060 S:0xbefff8cc] OC - Comm_get&gt; Enter(queue=0x10000, msg=0xbefff960, timeout=-1)<br />@0,388,900us: [+0 T:0x40018060 S:0xbefff8cc] OC - Comm_get&gt; MSGQ_Get() status=0x8000, return (0)<br />[DSP] @0,152,976tk: [+0 T:0x8ba0006c S:0x8ba04024] CR - processRmsCmd(0x8fe038a8, 4056): cmd = 5<br />[DSP] @0,153,040tk: [+0 T:0x8ba0006c S:0x8ba04024] CR - remote time = 0x0, trace buffer size = 4032<br />@0,389,338us: [+0 T:0x40018060 S:0xbefff904] CE - Engine_fwriteTrace&gt; returning count [197]<br />@0,389,488us: [+0 T:0x40018060 S:0xbefff95c] OC - Comm_free&gt; Enter (msg=0x412df880)<br />@0,389,662us: [+0 T:0x40018060 S:0xbefff95c] OC - Comm_free&gt; return (0)<br />@0,389,807us: [+0 T:0x40018060 S:0xbefff964] OC - Comm_delete&gt; Enter (comm=0x3e9c0)<br />@0,390,276us: [+0 T:0x40018060 S:0xbefff93c] OM - Memory_free&gt; Enter(0x3e9c0, 0x4)<br />@0,390,472us: [+0 T:0x40018060 S:0xbefff93c] OM - Memory_free&gt; return (0x1)<br />@0,390,621us: [+0 T:0x40018060 S:0xbefff974] OC - Comm_delete&gt; return<br />@0,390,754us: [+0 T:0x40018060 S:0xbefff95c] OC - Comm_release&gt; Enter(queue=0x0)<br />@0,390,913us: [+0 T:0x40018060 S:0xbefff95c] OC - Comm_release&gt; return (0)<br />@0,391,059us: [+0 T:0x40018060 S:0xbefff974] CE - rserverClose(0x3d3e8), count = 1<br />@0,391,204us: [+0 T:0x40018060 S:0xbefff964] OP - Processor_delete&gt; Enter(proc=0x3e7b8)<br />@0,391,345us: [+0 T:0x40018060 S:0xbefff944] OP - doCmd&gt; Enter (cmdId=2, proc=0x3e7b8)<br />@0,391,484us: [+0 T:0x40018060 S:0xbefff934] ti.sdo.ce.osal.Sem - Entered Sem_post&gt; sem[0x3e4a0]<br />@0,391,647us: [+0 T:0x40018060 S:0xbefff944] ti.sdo.ce.osal.Sem - Leaving Sem_post&gt; sem[0x3e4a0]<br />@0,391,791us: [+0 T:0x40018060 S:0xbefff924] ti.sdo.ce.osal.Sem - Entered Sem_pend&gt; sem[0x3e4b8] timeout[0xffffffff]<br />@0,391,975us: [+0 T:0x40ad0b60 S:0x40ad050c] ti.sdo.ce.osal.Sem - Leaving Sem_pend&gt; sem[0x3e4a0] status[0]<br />@0,392,140us: [+0 T:0x40ad0b60 S:0x40ad052c] OP - getCmd_d&gt; Exit (result=2)<br />@0,392,286us: [+0 T:0x40ad0b60 S:0x40ad050c] OP - Processor_delete_d&gt; Enter (proc=0x3e7b8)<br />@0,392,429us: [+2 T:0x40ad0b60 S:0x40ad050c] OP - Processor_delete_d&gt; Closing remote transport...<br />@0,392,843us: [+2 T:0x40ad0b60 S:0x40ad050c] OP - Processor_delete_d&gt; Stopping DSP...<br />@0,393,270us: [+2 T:0x40ad0b60 S:0x40ad050c] OP - Processor_delete_d&gt; Closing pool...<br />@0,393,854us: [+2 T:0x40ad0b60 S:0x40ad050c] OP - Processor_delete_d&gt; Detaching from DSP...<br />@0,403,599us: [+2 T:0x40ad0b60 S:0x40ad050c] OP - Processor_delete_d&gt; Destroying DSP... (object, that is)<br />@0,404,774us: [+0 T:0x40ad0b60 S:0x40ad04e4] OM - Memory_free&gt; Enter(0x3e7e0, 0x0)<br />@0,404,976us: [+0 T:0x40ad0b60 S:0x40ad04e4] OM - Memory_free&gt; return (0x1)<br />@0,405,126us: [+0 T:0x40ad0b60 S:0x40ad052c] OP - Processor_delete_d&gt; return<br />@0,405,269us: [+0 T:0x40ad0b60 S:0x40ad051c] ti.sdo.ce.osal.Sem - Entered Sem_post&gt; sem[0x3e4b8]<br />@0,405,455us: [+0 T:0x40018060 S:0xbefff924] ti.sdo.ce.osal.Sem - Leaving Sem_pend&gt; sem[0x3e4b8] status[0]<br />@0,405,617us: [+0 T:0x40018060 S:0xbefff944] OP - doCmd&gt; Exit (result=1)<br />@0,405,755us: [+1 T:0x40018060 S:0xbefff964] OP - Processor_delete(0x3e7b8) freeing object ...<br />@0,405,891us: [+0 T:0x40018060 S:0xbefff93c] OM - Memory_free&gt; Enter(0x3e7b8, 0x24)<br />@0,406,033us: [+0 T:0x40018060 S:0xbefff93c] OM - Memory_free&gt; return (0x1)<br />@0,406,167us: [+0 T:0x40018060 S:0xbefff974] OP - Processor_delete&gt; return.<br />@0,406,295us: [+0 T:0x40018060 S:0xbefff974] CE - rserverClose(0x3d3e8) done.<br />@0,406,431us: [+0 T:0x40018060 S:0xbefff96c] OM - Memory_free&gt; Enter(0x3e788, 0x2c)<br />@0,406,570us: [+0 T:0x40018060 S:0xbefff96c] OM - Memory_free&gt; return (0x1)<br />Close In File!<br />Close Out File!<br />@0,407,161us: [+0 T:0x40ad0b60 S:0x40ad052c] ti.sdo.ce.osal.Sem - Leaving Sem_post&gt; sem[0x3e4b8]<br />@0,407,352us: [+0 T:0x40ad0b60 S:0x40ad052c] OP - getCmd_d&gt; Enter (proc=0x40ad05a4)<br />@0,407,504us: [+0 T:0x40ad0b60 S:0x40ad050c] ti.sdo.ce.osal.Sem - Entered Sem_pend&gt; sem[0x3e4a0] timeout[0xffffffff]<br />@0,640,509us: [+0 T:0x40018060 S:0xbefffc4c] OG - Global_exit&gt; enter<br />@0,640,688us: [+2 T:0x40018060 S:0xbefffc4c] OG - Global_exit&gt; calling function *0xcf14()...<br />@0,640,859us: [+2 T:0x40018060 S:0xbefffc4c] OG - Global_exit&gt; calling function *0xef18()...<br />@0,641,009us: [+2 T:0x40018060 S:0xbefffc4c] OG - Global_exit&gt; calling function *0x103c8()...<br />@0,641,179us: [+0 T:0x40018060 S:0xbefffc14] OM - Memory_free&gt; Enter(0x3e6c8, 0x18)<br />@0,641,337us: [+0 T:0x40018060 S:0xbefffc14] OM - Memory_free&gt; return (0x1)<br />@0,641,478us: [+0 T:0x40018060 S:0xbefffc14] OM - Memory_free&gt; Enter(0x3e6e8, 0x18)<br />@0,641,618us: [+0 T:0x40018060 S:0xbefffc14] OM - Memory_free&gt; return (0x1)<br />@0,641,749us: [+0 T:0x40018060 S:0xbefffc14] OM - Memory_free&gt; Enter(0x3e708, 0x18)<br />@0,641,886us: [+0 T:0x40018060 S:0xbefffc14] OM - Memory_free&gt; return (0x1)<br />@0,642,021us: [+2 T:0x40018060 S:0xbefffc4c] OG - Global_exit&gt; calling function *0x18610()...<br />@0,642,158us: [+2 T:0x40018060 S:0xbefffc4c] OG - Global_exit&gt; calling function *0x13044()...<br />@0,642,295us: [+2 T:0x40018060 S:0xbefffc4c] OG - Global_exit&gt; calling function *0x135a4()...<br />@0,642,430us: [+2 T:0x40018060 S:0xbefffc4c] OG - Global_exit&gt; calling function *0x16150()...<br />@0,642,565us: [+2 T:0x40018060 S:0xbefffc4c] OG - Global_exit&gt; calling function *0x1405c()...<br />@0,642,703us: [+0 T:0x40018060 S:0xbefffc14] OP - doCmd&gt; Enter (cmdId=3, proc=0x0)<br />@0,642,839us: [+0 T:0x40018060 S:0xbefffc04] ti.sdo.ce.osal.Sem - Entered Sem_post&gt; sem[0x3e4a0]<br />@0,643,000us: [+0 T:0x40018060 S:0xbefffc14] ti.sdo.ce.osal.Sem - Leaving Sem_post&gt; sem[0x3e4a0]<br />@0,643,147us: [+0 T:0x40018060 S:0xbefffbf4] ti.sdo.ce.osal.Sem - Entered Sem_pend&gt; sem[0x3e4b8] timeout[0xffffffff]<br />@0,643,333us: [+0 T:0x40ad0b60 S:0x40ad050c] ti.sdo.ce.osal.Sem - Leaving Sem_pend&gt; sem[0x3e4a0] status[0]<br />@0,643,498us: [+0 T:0x40ad0b60 S:0x40ad052c] OP - getCmd_d&gt; Exit (result=3)<br />@0,643,643us: [+0 T:0x40ad0b60 S:0x40ad051c] ti.sdo.ce.osal.Sem - Entered Sem_post&gt; sem[0x3e4b8]<br />@0,643,801us: [+0 T:0x40ad0b60 S:0x40ad052c] ti.sdo.ce.osal.Sem - Leaving Sem_post&gt; sem[0x3e4b8]<br />@0,644,069us: [+0 T:0x40018060 S:0xbefffbf4] ti.sdo.ce.osal.Sem - Leaving Sem_pend&gt; sem[0x3e4b8] status[0]<br />@0,644,244us: [+0 T:0x40018060 S:0xbefffc14] OP - doCmd&gt; Exit (result=1)<br />@0,644,386us: [+0 T:0x40018060 S:0xbefffc1c] OT - Thread_delete&gt; Enter (task=0x3e4f0)<br />@0,644,564us: [+4 T:0x40018060 S:0xbefffc1c] OT - Thread_delete&gt; pthread_cancel (0x3)<br />@0,644,725us: [+4 T:0x40018060 S:0xbefffc1c] OT - Thread_delete&gt; pthread_join (0x0)<br />@0,644,866us: [+0 T:0x40018060 S:0xbefffbf4] OM - Memory_free&gt; Enter(0x3e4f0, 0x64)<br />@0,645,062us: [+0 T:0x40018060 S:0xbefffbf4] OM - Memory_free&gt; return (0x1)<br />@0,645,212us: [+0 T:0x40018060 S:0xbefffc34] OT - Thread_delete&gt; Exit (task=0x3e4f0)<br />@0,645,350us: [+0 T:0x40018060 S:0xbefffc24] ti.sdo.ce.osal.Sem - Entered Sem_delete&gt; sem[0x3e4a0]<br />@0,645,513us: [+0 T:0x40018060 S:0xbefffbfc] OM - Memory_free&gt; Enter(0x3e4a0, 0x14)<br />@0,645,667us: [+0 T:0x40018060 S:0xbefffbfc] OM - Memory_free&gt; return (0x1)<br />@0,645,803us: [+0 T:0x40018060 S:0xbefffc34] ti.sdo.ce.osal.Sem - Leaving Sem_delete&gt;<br />@0,645,931us: [+0 T:0x40018060 S:0xbefffc24] ti.sdo.ce.osal.Sem - Entered Sem_delete&gt; sem[0x3e4b8]<br />@0,646,065us: [+0 T:0x40018060 S:0xbefffbfc] OM - Memory_free&gt; Enter(0x3e4b8, 0x14)<br />@0,646,208us: [+0 T:0x40018060 S:0xbefffbfc] OM - Memory_free&gt; return (0x1)<br />@0,646,339us: [+0 T:0x40018060 S:0xbefffc34] ti.sdo.ce.osal.Sem - Leaving Sem_delete&gt;<br />@0,646,465us: [+0 T:0x40018060 S:0xbefffc0c] OM - Memory_free&gt; Enter(0x3e4d0, 0x18)<br />@0,646,605us: [+0 T:0x40018060 S:0xbefffc0c] OM - Memory_free&gt; return (0x1)<br />@0,646,740us: [+2 T:0x40018060 S:0xbefffc4c] OG - Global_exit&gt; calling function *0x184ac()...<br />@0,646,904us: [+2 T:0x40018060 S:0xbefffc4c] OG - Global_exit&gt; calling function *0x1535c()...<br />@0,647,055us: [+0 T:0x40018060 S:0xbefffc24] OM - Memory_free&gt; Enter(0x3e420, 0x18)<br />@0,647,203us: [+0 T:0x40018060 S:0xbefffc24] OM - Memory_free&gt; return (0x1)<br />@0,647,338us: [+2 T:0x40018060 S:0xbefffc4c] OG - Global_exit&gt; calling function *0x17710()...<br />@0,647,495us: [+0 T:0x40018060 S:0xbefffc0c] OM - Memory_free&gt; Enter(0x3e3d0, 0x18)<br />@0,647,644us: [+0 T:0x40018060 S:0xbefffc0c] OM - Memory_free&gt; return (0x1)<br />@0,647,781us: [+2 T:0x40018060 S:0xbefffc4c] OG - Global_exit&gt; calling function *0x18e28()...<br />@0,647,919us: [+2 T:0x40018060 S:0xbefffc4c] OG - Global_exit&gt; calling function *0x19990()...<br />@0,648,056us: [+2 T:0x40018060 S:0xbefffc4c] OG - Global_exit&gt; calling function *0x18834()...</p><div style="clear:both;"></div>http://community.ti.com/forums/thread/46321.aspxFri, 30 Oct 2009 18:11:32 GMT35ded035-4cd5-4bbd-851f-937553e04a39:46321apoorva1http://community.ti.com/forums/thread/46321.aspxhttp://community.ti.com/forums/commentrss.aspx?SectionID=144&PostID=46321<p>Hi everybody,</p> <p>I am working on RemoTI development kit that includes rf universal remote control,target module and cc debugger.I am unable to figure out:</p> <p>1. how should i connect the target module to television if my television does not have serial port?</p> <p>2. How should i use spi/ uart/l2c/ir port on target module to achieve this task?</p> <p>3. Do i have to connect the module to television in A/V mode?</p> <p>4. Is it possible to control the devices using IR signals?</p> <p>5. How many devices like TV,DVD player,SET TOP BOX can be controlled simultaneously if i have only one target module?</p> <p>6. Is it necessary to always have the target module connected to the device intended for communication?</p> <p>Thanks,</p> <p>Apoorva</p><div style="clear:both;"></div>